BS62LV2006(2004) 查看數據表（PDF） - Brilliance Semiconductor

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BS62LV2006
(Rev.:2004)

Very Low Power/Voltage CMOS SRAM 256K X 8 bit

Brilliance Semiconductor 

BSI

„ SWITCHING WAVEFORMS (READ CYCLE)

READ CYCLE1 (1,2,4)

t RC

ADDRESS

t OH

t AA

D OUT

BS62LV2006

t OH

READ CYCLE2 (1,3,4)

CE1

t ACS1

CE2

D OUT

READ CYCLE3 (1,4)

ADDRESS

OE

CE1

CE2

D OUT

t ACS2

(5)

t CLZ

t RC

t AA

t OE

t OLZ

t ACS1

(5)

t CLZ1

t ACS2

(5)

t CLZ2

NOTES:

1. WE is high in read Cycle.

2. Device is continuously selected when CE1 = VIL and CE2= VIH.

3. Address valid prior to or coincident with CE1 transition low and/or CE2 transition high.

4. OE = VIL .

5. The parameter is guaranteed but not 100% tested.

R0201-BS62LV2006

5

(5)

t t CHZ1, CHZ2

t OH

t (5)

OHZ

(1,5)

t CHZ1

(2,5)

t CHZ2

Revision 1.1

Jan. 2004

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