BS62LV8005 查看數據表（PDF） - Brilliance Semiconductor
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BS62LV8005 Datasheet PDF : 10 Pages
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BSI
AC TEST CONDITIONS
Input Pulse Levels
Input Rise and Fall Times
Input and Output
Timing Reference Level
Vcc/0
5ns
0.5Vcc
AC TEST LOADS AND WAVEFORMS
5.0V
1928 Ω
5.0V
OUTPUT
1928 Ω
INCLUDING
JIG AND
SCOPE
100PF
1020 Ω
INCLUDING
JIG AND
SCOPE
5PF
1020 Ω
FIGURE 1A
OUTPUT
THEVENIN EQUIVALENT
667 Ω
FIGURE 1B
1.73V
Vcc
GND
ALL INPUT PULSES
10%
→
90% 90%
←
→
FIGURE 2
10%
← 5ns
BS62LV8005
KEY TO SWITCHING WAVEFORMS
WAVEFORM
INPUTS
MUST BE
STEADY
MAY CHANGE
FROM H TO L
MAY CHANGE
FROM L TO H
,
DON T CARE:
ANY CHANGE
PERMITTED
DOES NOT
APPLY
OUTPUTS
MUST BE
STEADY
WILL BE
CHANGE
FROM H TO L
WILL BE
CHANGE
FROM L TO H
CHANGE :
STATE
UNKNOWN
CENTER
LINE IS HIGH
IMPEDANCE
”OFF ”STATE
AC ELECTRICAL CHARACTERISTICS ( TA = 0oC to + 70oC , Vcc = 5V )
READ CYCLE
JEDEC
PARAMETER
NAME
t AVAX
t AVQV
t E1LQV
t E2LQV
t GLQV
t ELQX
t GLQX
t EHQZ
t GHQZ
t AXOX
PARAMETER
NAME
DESCRIPTION
t RC
t AA
t ACS1
t ACS2
t OE
t CLZ
t OLZ
t CHZ
t OHZ
t OH
Read Cycle Time
Address Access Time
Chip Select Access Time (CE1)
Chip Select Access Time (CE2)
Output Enable to Output Valid
Chip Select to Output Low Z
Output Enable to Output in Low Z
Chip Deselect to Output in High Z
Output Disable to Output in High Z
Output Disable to Output Address Change
BS62LV8005- 70
MIN. TYP. MAX.
70
--
--
--
--
70
--
--
70
--
--
70
--
--
35
10
--
--
10
--
--
0
--
35
0
--
30
10
--
--
BS62LV8005- 55
MIN. TYP. MAX.
55 -- --
-- -- 55
-- -- 55
-- -- 55
-- -- 30
10 -- --
10 -- --
0 -- 30
0 -- 25
10 -- --
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
R0201-BS62LV8005
4
Revision 2.4
April 2002
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