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OM5202 查看數據表(PDF) - Philips Electronics

零件编号
产品描述 (功能)
比赛名单
OM5202
Philips
Philips Electronics Philips
OM5202 Datasheet PDF : 11 Pages
1 2 3 4 5 6 7 8 9 10
Philips Semiconductors
ROMless 8-bit microcontroller
Product specification
OM5202
AC ELECTRICAL CHARACTERISTICS1, 2
16MHz CLOCK
VARIABLE CLOCK
SYMBOL FIGURE
PARAMETER
MIN MAX
MIN
MAX
1/tCLCL
2
tLHLL
2
tAVLL
2
tLLAX
2
tLLIV
2
tLLPL
2
tPLPH
2
tPLIV
2
tPXIX
2
tPXIZ
2
tAVIV
2
tPLAZ
2
Data Memory
Oscillator frequency
ALE pulse width
Address valid to ALE low
Address hold after ALE low
ALE low to valid instruction in
ALE low to PSEN low
PSEN pulse width
PSEN low to valid instruction in
Input instruction hold after PSEN
Input instruction float after PSEN
Address to valid instruction in
PSEN low to address float
1.2
16
85
2tCLCL–40
8
tCLCL–55
28
tCLCL–35
150
4tCLCL–100
23
tCLCL–40
143
3tCLCL–45
83
3tCLCL–105
0
0
38
tCLCL–25
208
5tCLCL–105
10
10
tRLRH
3, 4
tWLWH
3, 4
tRLDV
3, 4
tRHDX
3, 4
tRHDZ
3, 4
tLLDV
3, 4
tAVDV
3, 4
tLLWL
3, 4
tAVWL
3, 4
tQVWX
3, 4
tDW
3, 4
tWHQX
3, 4
tRLAZ
3, 4
tWHLH
3, 4
Shift Register
RD pulse width
WR pulse width
RD low to valid data in
Data hold after RD
Data float after RD
ALE low to valid data in
Address to valid data in
ALE low to RD or WR low
Address valid to WR low or RD low
Data valid to WR transition
Data setup time before WR
Data hold after WR
RD low to address float
RD or WR high to ALE high
275
6tCLCL–100
275
6tCLCL–100
148
5tCLCL–165
0
0
55
2tCLCL–70
350
8tCLCL–150
398
9tCLCL–165
138
238
3tCLCL–50
3tCLCL+50
120
4tCLCL–130
3
tCLCL–60
288
7tCLCL–150
13
tCLCL–50
0
0
23
103
tCLCL–40
tCLCL+40
tXLXL
5
Serial port clock cycle time3
0.75
12tCLCL
tQVXH
tXHQX
tXHDX
tXHDV
5
Output data setup to clock rising edge3
5
Output data hold after clock rising edge3
5
Input data hold after clock rising edge3
5
Clock rising edge to input data valid3
492
10tCLCL–133
80
2tCLCL–117
0
0
492
External Clock
tCHCX
tCLCX
tCLCH
tCHCL
6
High time3
6
Low time3
6
Rise time3
6
Fall time3
20
20
20
20
20
20
NOTES:
1. Parameters are valid over operating temperature range unless otherwise specified.
2. Load capacitance for port 0, ALE, and PSEN = 100pF, load capacitance for all other outputs = 80pF.
3. These values are characterized but not 100% production tested.
10tCLCL–133
tCLCL – tCLCX
tCLCL – tCHCX
20
20
UNIT
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
ns
ns
ns
ns
ns
ns
ns
ns
December 1994
8

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