CA3160 查看數據表（PDF） - Intersil

零件编号

产品描述 (功能)

比赛名单

CA3160

4MHz, BiMOS Operational Amplifier with MOSFET Input/CMOS Output

Intersil 

CA3160, CA3160A

Electrical Specifications For Design Guidance, VSUPPLY = ±7.5V, TA = 25oC, Unless Otherwise Specified (Continued)

CA3160 CA3160A

PARAMETER

SYMBOL

TEST CONDITIONS

TYP

TYP

Unity Gain Crossover Frequency

fT

Slew Rate

SR

4

4

10

10

Transient Response

Rise and Fall Time

tr

CL = 25pF, RL = 2kΩ, (Voltage Follower)

0.09

0.09

Overshoot

OS

10

10

Settling Time

tS

CL = 25pF, RL = 2kΩ, (Voltage Follower)

1.8

1.8

To <0.1%, VIN = 4VP-P

UNITS

MHz

V/µs

µs

%

µs

Electrical Specifications For Design Guidance, V+ = +5V, V- = 0V, TA = 25oC, Unless Otherwise Specified

CA3160

CA3160A

PARAMETER

SYMBOL

TEST CONDITIONS

TYP

TYP

Input Offset Voltage

Input Offset Current

Input Current

Common-Mode Rejection Ratio

VIO

IIO

Il

CMRR

6

2

0.1

0.1

2

2

80

90

Large Signal Voltage Gain

AOL VO = 4VP-P, RL = 5kΩ

100

100

100

100

Common-Mode Input Voltage Range

Supply Current

VlCR

I+

VO = 5V, RL = ∞

VO = 2.5V, RL = ∞

Power Supply Rejection Ratio

PSRR ∆VIO/∆V+

NOTE:

3. ICC typically increases by 1.5mA/MHz during operation.

0 to 2.8

300

500

200

0 to 2.8

300

500

200

UNITS

mV

pA

pA

dB

kV/V

dB

V

µA

µA

µV/V

Block Diagram

+

3

INPUT

2

-

200µA

1.35mA

BIAS CKT.

200µA

AV ≈ 5X

AV ≈

6000X

8mA

(NOTE 4)

0mA

(NOTE 5)

AV ≈ 30X

7 V+

NOTES:

4. Total supply voltage (for indicated voltage

gains) = 15V with input terminals biased so

that Terminal 6 potential is +7.5V above

Terminal 4.

5. Total supply voltage (for indicated voltage

gains) = 15V with output terminal driven to

either supply rail.

OUTPUT

6

51

OFFSET

NULL

CC

COMPENSATION

(WHEN DESIRED)

3

4 V-

8

STROBE

Share Link: