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CMX649 查看數據表(PDF) - CML Microsystems Plc

零件编号
产品描述 (功能)
比赛名单
CMX649
CML
CML Microsystems Plc CML
CMX649 Datasheet PDF : 50 Pages
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ADM Codec
CMX649
5.2 C-BUS Description
Address/Commands
Instructions and data are transferred, via C-BUS, in accordance with the timing information given
in Figure 12.
Instruction and data transactions to and from the CMX649 consist of an Address/Command (A/C)
byte followed by either:
(i)
a further instruction or data (1 or 2 bytes) or
(ii) a status or Rx data reply (1 or 2 bytes)
Write Only C-BUS Registers
REGISTER
NAME
GENERAL
RESET
AAF/AIF
BANDWIDTH
VOLUME/SIDE-
TONE LEVEL
AUDIO INPUT
LEVEL CTRL
POWER
CONTROL 1
POWER
CONTROL 2
CODEC MODE
CONTROL
SCRAMBLER
CONTROL (1)
(2)
CLK DIVIDER
CONTROL (1)
HEX
ADDRESS/
COMMAN
D
$01
$61
$62
$63
$64
$65
$70
$71
$72
BIT 7
(D7)
BIT 6
(D6)
BIT 5
(D5)
BIT 4
(D4)
BIT3
(D3)
BIT 2
(D2)
BIT 1
(D1)
BIT 0
(D0)
X
By-Pass
X
X
X
Anti-Alias Filter
Band-Width
Volume
X
By-Pass
X
X
X
Anti-Image Filter
Band-Width
Side-Tone
ON/OFF
Input Level
0
0
0
0
Anti-
Alias
Filter
Mic Amp Current
0
Anti-
Image
Filter
Audio Current
Enc DAC Current
Dec DAC Current
Volume Current
Xtal
Current
Analog
Enable
0
0
0
0
0
Codec Modes
SCRAMBLER
EN
0
INVERT
T7
T6
T5
DE-SCRAMBLER
EN
0
INVERT
Polynomial
T4
T3
T2
Polynomial
T9
T8
T1
T0
PREN DCKEN ECKEN Filter Pre-Scaler
Filter Divider
(2)
CLK SOURCE
CONTROL (1)
(2)
CODEC
INTERRUPT
CONTROL
Bit Clock Pre-Scaler
Decoder Bit Clock Divider
Encoder Bit Clock Divider
0
0
Phase Detect Input
0
0
0
0
$73
Select
PLL EN
Rx Bit
Clk
Select
Tx Bit Clock Select
Data
Filter By-
Pass
Data Filter and
Slicer Power
Control
Data
Filter
BW
$81
Encode Enable
Decode Enable
© 2003 CML Microsystems Plc
13
D/649/2

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