CMX882 查看數據表（PDF） - CML Microsystems Plc

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CMX882

FRS Signalling Processor

CML Microsystems Plc 

FRS Signalling Processor

CMX882

AC Parameters

Notes

Modulator Outputs 1 and 2 and Audio Output

(MOD_1, MOD_2, AUDIO)

Power-up to output stable

37

Modulator Attenuators

Attenuation (at 0dB)

Cumulative Attenuation Error 

(wrt attenuation at 0dB)



Output Impedance

 Enabled

38

 Disabled

38

Audio Attenuator

Attenuation (at 0dB)

Cumulative Attenuation Error 

(wrt attenuation at 0dB)



Output Impedance

 Enabled

38

 Disabled

38

Feedback load resistance

Amplifier open loop voltage gain 

(I/P = 1mV rms at 100Hz) 

Unity gain bandwidth

Min.

−0.2

−0.6

−0.5

−1.0

80

Typ.

50

0

600

500

0

600

500

60

1.0

Max.

Unit

100

µs

0.2

dB

0.6

dB

Ω

kΩ

0.5

dB

1.0

dB

Ω

kΩ

kΩ

dB

MHz

Notes: 37

38

Power-up refers to issuing a C-BUS command to turn on an output. These limits

apply only if VBIAS is on and stable. At power supply switch-on, the default state

is for all blocks, except the XTAL and C-BUS interface, to be in placed in power-

save mode.

Small signal impedance, at VDD = 3.0V and Tamb = 25°C.

 2004 CML Microsystems Plc

62

D/882/7

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