CPV362M4K
Vg GATE SIG NAL
DEVICE UNDER TEST
CURRENT D.U.T.
VOLTAGE IN D.U.T.
CURRENT IN D1
t0
t1 t2
Figure 18e. Macro Waveforms for Figure 18a's Test Circuit
50V
6000µF
100V
L
1000V Vc*
D.U.T.
0 - 480V
RL=
480V
4 X IC @25°C
Figure 19. Clamped Inductive Load Test
Circuit
Figure 20. Pulsed Collector Current
Test Circuit