CXA1166 查看數據表（PDF） - Sony Semiconductor
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CXA1166 Datasheet PDF : 28 Pages
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Electrical Characteristics Measurement Circuit
Integral Linearity Error Measurement Circuit
Differential Linearity Error Measurement Circuit
+V
S2
S1:ON when A<B
S1 S2: ON when A>B
VIN
DVM
–V
DUT
8
CXA1166K
“0”
A<B A>B
Comparator
A8 B8 8
to to
A1 B1
A0 B0
“1 ”
Controller
Buffer
000•••00
to
111•••10
CXA1166K
Sampling Delay Measurement circuit
Aperture Jitter Measurement circuit
60MHz
OSC1
φ:Variable
fr
Amp
VIN
CLK
OSC2
60MHz
ECL
Buffer
8
CXA1166K
Logic
Analizer
1024
samples
Aperture Jitter Measurement Method
0V
VIN
–1V
–2V
CLK
∆υ
∆t
VIN
129
t
128
127
126
125
σ (LSB)
CLK
Sampling timing fluctuation
( = aperture jitter)
When the distribution of the output codes is σ (unit: LSB) If
the maximum slew rate point is sampled with the clock signal
having the same frequency as that of the analog input signal,
Aperture jitter (Taj) is defined as follows:
Taj = σ/
∆υ
∆t
= σ/ (
256
2
× 2πf )
–8–
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