CY2280 查看數據表（PDF） - Cypress Semiconductor
零件编号
产品描述 (功能)
比赛名单
CY2280
Cypress Semiconductor
CY2280 Datasheet PDF : 12 Pages
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CY2280
Function Table (-11S Option)
SEL100
0
0
0
0
0
1
1
1
1
1
SEL1
0
0
1
1
1
0
0
1
1
1
SEL0
0
1
0
1
1
0
1
0
1
1
SEL_SS[2]
N/A
N/A
N/A
0 (downspread)
1 (no spread)
N/A
N/A
N/A
0 (downspread)
1 (no spread)
CPU/PCI
Ratio
2
2
2
2
2
3
3
3
3
3
CPUCLK
Hi-Z
Reserved
Reserved
66.66 MHz
66.66 MHz
TCLK/2
Reserved
Reserved
100 MHz
100 MHz
PCICLK_F
PCICLK
Hi-Z
Reserved
Reserved
33.33 MHz
33.33 MHz
TCLK/6
Reserved
Reserved
33.33 MHz
33.33 MHz
REF
Hi-Z
14.318 MHz
14.318 MHz
14.318 MHz
14.318 MHz
TCLK[3]
14.318 MHz
14.318 MHz
14.318 MHz
14.318 MHz
APIC
Hi-Z
14.318 MHz
14.318 MHz
14.318 MHz
14.318 MHz
TCLK[3]
14.318 MHz
14.318 MHz
14.318 MHz
14.318 MHz
Function Table (-21S Option)
SEL100
0
0
0
0
0
1
1
1
1
1
SEL1
0
0
1
1
1
0
0
1
1
1
SEL0
0
1
0
1
1
0
1
0
1
1
SEL_SS[2]
N/A
N/A
N/A
0 (downspread)
1 (no spread)
N/A
N/A
N/A
0 (downspread)
1 (no spread)
CPU/PCI
Ratio
2
2
2
2
2
3
3
3
3
3
CPUCLK
Hi-Z
Reserved
Reserved
66.66 MHz
66.66 MHz
TCLK/2
Reserved
Reserved
100 MHz
100 MHz
PCICLK_F
PCICLK
Hi-Z
Reserved
Reserved
33.33 MHz
33.33 MHz
TCLK/6
Reserved
Reserved
33.33 MHz
33.33 MHz
REF
Hi-Z
14.318 MHz
14.318 MHz
14.318 MHz
14.318 MHz
TCLK[3]
14.318 MHz
14.318 MHz
14.318 MHz
14.318 MHz
APIC
Hi-Z
Reserved
Reserved
16.67 MHz
16.67 MHz
TCLK/12[3]
Reserved
Reserved
16.67 MHz
16.67 MHz
USBCLK
Hi-Z
48 MHz
48 MHz
48 MHz
48 MHz
TCLK/2
48 MHz
48 MHz
48 MHz
48 MHz
USBCLK
Hi-Z
48 MHz
48 MHz
48 MHz
48 MHz
TCLK/2
48 MHz
48 MHz
48 MHz
48 MHz
Actual Clock Frequency Values
Clock Output
CPUCLK
CPUCLK
USBCLK
Target Frequency Actual Frequency
(MHz)
(MHz)
PPM
66.67
66.654
–195
100
99.77
–2346
48.0
48.008
167
Power Management Logic
CPU_STOP PCI_STOP PWR_DWN
CPUCLK
PCICLK
X
X
0
Low
Low
0
0
1
Low
Low
0
1
1
Low
Running
1
0
1
Running
Low
1
1
1
Running
Running
Notes:
2. Target frequency is modulated by percentage shown (max.) when SEL_SS = 0.
3. TCLK supplied on the XTALIN pin in Test Mode.
Other
PCICLK_F Clocks
Low
Low
Running Running
Running Running
Running Running
Running Running
Osc. PLLs
Off
Off
Running Running
Running Running
Running Running
Running Running
Document #: 38-07207 Rev. *A
Page 3 of 12
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