CY7C148 查看數據表（PDF） - Cypress Semiconductor
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CY7C148 Datasheet PDF : 9 Pages
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CY7C148
CY7C149
Switching Waveforms
Read Cycle No. 1 [10,11]
tRC
ADDRESS
DATA OUT
tAA
tOH
PREVIOUS DATA VALID
Read Cycle No. 2 [10,12]
tRC
CS
tACS
DATA VALID
C148–6
DATA OUT
VCC
SUPPLY
CURRENT
tLZ
HIGH IMPEDANCE
tPU
50%
Write Cycle No.1 (WE Controlled)
ADDRESS
CS
tAS
WE
DATA IN
tWC
tCW
tAW
DATA OUT
DATA UNDEFINED
Notes:
10. WE is HIGH for read cycle.
11. Device is continuously selected, CS = VIL.
12. Address valid prior to or coincident with CS transition LOW.
DATA VALID
tHZ
HIGH
IMPEDANCE
tPD
50%
ICC
ISB
C148–7
tWA
tWP
tDW
tDH
DATA–IN VALID
tWZ
tOW
HIGH IMPEDANCE
C148–8
Document #: 38-05059 Rev. **
Page 4 of 9
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