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IS61C3216 查看數據表(PDF) - Integrated Silicon Solution

零件编号
产品描述 (功能)
比赛名单
IS61C3216
ISSI
Integrated Silicon Solution ISSI
IS61C3216 Datasheet PDF : 8 Pages
1 2 3 4 5 6 7 8
IS61C3216
ISSI ®
CAPACITANCE(1)
Symbol
CIN
COUT
Parameter
Input Capacitance
Input/Output Capacitance
Conditions
VIN = 0V
VOUT = 0V
Max.
Unit
6
pF
8
pF
Note:
1. Tested initially and after any design or process changes that may affect these parameters.
READ CYCLE SWITCHING CHARACTERISTICS(1) (Over Operating Range)
Symbol
tRC
tAA
tOHA
tACE
tDOE
tHZOE(2)
tLZOE(2)
tHZCE(2
tLZCE(2)
tBA
tHZB
tLZB
Parameter
Read Cycle Time
Address Access Time
Output Hold Time
CE Access Time
OE Access Time
OE to High-Z Output
OE to Low-Z Output
CE to High-Z Output
CE to Low-Z Output
LB, UB Access Time
LB, UB to High-Z Output
LB, UB to Low-Z Output
-10
Min. Max.
10 —
— 10
3—
— 10
—5
05
0—
05
4—
—5
05
5—
-12
Min. Max.
12 —
— 12
3—
— 12
—5
06
0—
06
4—
—6
06
5—
-15
Min. Max.
15 —
— 15
3—
— 15
—7
07
0—
07
4—
—7
07
5—
-20
Min. Max. Unit
20 — ns
— 20 ns
3 — ns
— 20 ns
— 8 ns
— 8 ns
0 — ns
0 8 ns
4 — ns
— 8 ns
— 8 ns
5 — ns
Notes:
1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse levels of
0 to 3.0V and output loading specified in Figure 1a.
2. Tested with the load in Figure 1b. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.
3. Not 100% tested.
AC TEST CONDITIONS
Parameter
Input Pulse Level
Input Rise and Fall Times
Input and Output Timing
and Reference Level
Output Load
AC TEST LOADS
5V
Unit
0V to 3.0V
3 ns
1.5V
See Figures 1a and 1b
480
5V
480
OUTPUT
30 pF
Including
jig and
scope
255
Figure 1a.
OUTPUT
5 pF
Including
jig and
scope
255
Figure 1b.
Integrated Silicon Solution, Inc.
SR007-1B
01/26/98

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