CY7C287 查看數據表（PDF） - Cypress Semiconductor
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CY7C287 Datasheet PDF : 8 Pages
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CY7C287
DIP
LCC
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
D0
D1
D2
GND
1
28
2
27
3
26
4
25
5
24
6 7C287 23
7
22
8
21
9
20
10
19
11
18
12
17
13
16
14
15
VCC
A10
A11
A12/A14
A13/A15
LATCH
VPP
PGM
VFY
D7
D6
D5
D4
D3
C287-9
A5
A4
A3
NC
A2
A1
A0
GND
D0
4 3 2 1 32 31 30
5
29
6
7
28
7C287 27
8
26
9
25
10
24
11
23
12
22
13
21
14 15 16 17 18 19 20
A12/A14
A13/A15
LATCH
VPP
NC
PGM
VFY
D7
GND
C287-10
Figure 1. Programming Pinouts
Architecture Configuration Bits
Architecture
Bit
E/ES
Device
7C287
Architecture Verify
D0
D0
0 = Erased
1 = PGMED
Function
Asynchronous Output Enable (Pin 20 = E)
Synchronous Output Enable (Pin 20 = ES)
Bit Map
Programmer Address
(Hex.)
0000
.
.
FFFF
10000
Architecture Byte (10000H)
D7
D0
C7 C6 C5 C4 C3 C2 C1C0
RAM Data
Data
.
.
Data
Control Byte
5
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