CY7C43683-10 查看數據表（PDF） - Cypress Semiconductor
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CY7C43683-10 Datasheet PDF : 29 Pages
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Pin Configuration
CY7C43643
CY7C43663
CY7C43683
W/RA
1
ENA
2
CLKA
3
GND
4
A35
5
A34
6
A33
7
A32
8
VCC
9
A31
10
A30
11
GND
12
A29
13
A28
14
A27
15
A26
16
A25
17
A24
18
A23
19
BE/FWFT
20
GND
21
A22
22
VCC
23
A21
24
A20
25
A19
26
A18
27
GND
28
A17
29
A16
30
A15
31
A14
32
A13
33
VCC
34
A12
35
GND
36
A11
37
A10
38
TQFP
Top View
CY7C43643
CY7C43663
CY7C43683
102 CLKB
101 VCC
100 VCC
99
B35
98
B34
97
B33
96
B32
95 GND
94 GND
93
B31
92 B30
91 B29
90 B28
89 B27
88 B26
87 RT
86
B25
85 B24
84 BM
83 GND
82
B23
81
B22
80
B21
79
B20
78 B19
77 B18
76 GND
75 B17
74 B16
73 SIZE
72
VCC
71
B15
70 B14
69 B13
68 B12
67 GND
66 B11
65 B10
Selection Guide
Maximum Frequency
Maximum Access Time
Minimum Cycle Time
Minimum Data or Enable Set-up
Minimum Data or Enable Hold
Maximum Flag Delay
Active Power Supply Commercial
Current (ICC1)
Industrial
Density
Package
CY7C43643/63/83
–7
133
6
7.5
3
0
6
100
CY7C43643
1K x 36
128 TQFP
CY7C43643/63/83
–10
100
8
10
4
0
8
100
CY7C43663
4K x 36
128 TQFP
CY7C43643/63/83
–15
66.7
10
15
5
0
8
100
100
Unit
MHz
ns
ns
ns
ns
ns
mA
CY7C43683
16K x 36
128 TQFP
Document #: 38-06021 Rev. *B
Page 2 of 29
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