DG9424(2003) 查看數據表（PDF） - Vishay Semiconductors

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DG9424
(Rev.:2003)

Low-Voltage, Dual Supply, Low rON, Quad SPST Analog Switches

Vishay Semiconductors 

DG9424/9425/9426

Vishay Siliconix

SCHEMATIC DIAGRAM (TYPICAL CHANNEL)

V+

VL

VIN

GND

V-

TEST CIRCUITS

Level

Shift/

Drive

FIGURE 1.

S

V-

V+

D

VIN

VIN1

VIN2

VL

VL

NO or NC

IN

GND

V+

V+

COM

V-

RL

300 W

VOUT

CL

35 pF

Logic

Input

VINH

VINL

VOUT

Switch

0V

Output

50%

tr <5 ns

tf <5 ns

tOFF

90%

0.9 x VOUT

tON

V-

Switch

CL (includes fixture and stray capacitance)

VOUT = VIN

RL

RL + rON

Note: Logic input waveform is inverted for switches that

have the opposite logic sense control

FIGURE 2. Switching Time

VL

V+

NO1

IN1

NC2

IN2

GND

COM1

VO1

COM2

VO2

RL1

300 W

CL1

35 pF

V-

RL2

300 W

CL2

35 pF

Logic

Input

Switch

Output

3V

0V

VIN1

VO1

0V

VIN2

VO2

Switch

0V

Output

50%

90%

90%

tD

tD

V-

CL (includes fixture and stray capacitance)

FIGURE 3. Break-Before-Make (DG9426)

www.vishay.com

8

Document Number: 71807

S-31267—Rev. C, 16-Jun-03

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