DM9161A 查看數據表（PDF） - Davicom Semiconductor, Inc.
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DM9161A Datasheet PDF : 45 Pages
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DM9161A
10/100 Mbps Fast Ethernet Physical Layer Single Chip Transceiver
Binary
In
D
Q
Q.
CK
.
Binary plus
Common
driver
Binary minus
MLT-3
Binary
In
MLT-3
Figure 7-4
7.2.2 100Base-TX Receiver
The 100Base-TX receiver contains several function blocks
that convert the scrambled 125Mb/s serial data to
synchronous 4-bit nibble data, which is then provided to the
MII.
The receive section contains the following functional blocks:
- Signal Detect
- Adaptive Equalizer
- MLT-3 to NRZI Decoder
- Clock Recovery Module
- NRZI to NRZ Decoder
- Serial to Parallel
- Descrambler
- Code Group Alignment
- 4B5B Decoder
7.2.2.1 Signal Detect
The signal detect function meets the specifications
mandated by the ANSI XT12 TP-PMD 100Base-TX
Standards for both voltage thresholds and timing
parameters.
7.2.2.2 Adaptive Equalizer
When transmitting data at high speeds over copper twisted
pair cable, attenuation based on frequency becomes a
concern. In high speed twisted pair signaling, the frequency
content of the transmitted signal can vary greatly during
normal operation based on the randomness of the
scrambled data stream. This variation in signal attenuation
caused by frequency variations must be compensated for to
ensure the integrity of the received data. In order to ensure
quality transmission when employing MLT-3 encoding, the
compensation must be able to adapt to various cable lengths
and cable types depending on the installed environment.
The selection of long cable lengths for a given
implementation requires significant compensation, which will
be over-kill in a situation that includes shorter, less
attenuating cable lengths. Conversely, the selection of short
or intermediate cable lengths requiring less compensation
will cause serious under-compensation for longer length
cables. Therefore, the compensation or equalization must be
adaptive to ensure proper conditioning of the received signal
independent of the cable length.
7.2.2.3 MLT-3 to NRZI Decoder
The DM9161A decodes the MLT-3 information from the
Digital Adaptive Equalizer into NRZI data. The relation
between NRZI and MLT-3 data is shown in figure 7-4.
7.2.2.4 Clock Recovery Module
Final
Version: DM9161A-DS-F01
October 16, 2009
The Clock Recovery Module accepts NRZI data from the
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