DM9161A
10/100 Mbps Fast Ethernet Physical Layer Single Chip Transceiver
5.5 Bias and Clock, 4 pins
Pin No.
47
48
42
43
Pin Name
BGRESG
BGRES
XT2
XT1
I/O
Description
P Bandgap Ground
O Bandgap Voltage Reference Resistor 6.8K ohm +/- 1%
I/O Crystal Output; REF_CLK input for RMII mode
I Crystal Input
5.6 Power, 12 pins
Pin No.
1,2
9
5
6
46
23,30,41
15,33,44
Pin Name
AVDDR
AVDDT
AGND
AGND
AGND
DVDD
DGND
I/O
Description
P Analog Receive Power output
P Analog Transmit Power output
P Analog Receive Ground
P Analog Transmit Ground
P Analog Substrate Ground
P Digital Power
P Digital Ground
5.7 Table A (Media Type Selection)
OP2
OP1
OP0
Function
0
0
0
Dual Speed 100/10 HDX
0
0
1
Reserved
0
1
0
Reserved
0
1
1
Manually Select 10TX HDX
1
0
0
Manually Select 10TX FDX
1
0
1
Manually Select 100TX HDX
1
1
0
Manually Select 100TX FDX
1
1
1
Auto-negotiation Enables All Capabilities
9
Final
Version: DM9161A-DS-F01
October 16, 2009