DS1086L 查看數據表（PDF） - Maxim Integrated
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DS1086L Datasheet PDF : 17 Pages
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3.3V Spread-Spectrum EconOscillator
SDA
SCL
START
CONDITION
MSB
SLAVE ADDRESS
R/W
DIRECTION
BIT
ACKNOWLEDGEMENT
SIGNAL FROM RECEIVER
1
2
6
7
8
9
ACK
Figure 4. 2-Wire Data Transfer Protocol
ACKNOWLEDGEMENT
SIGNAL FROM RECEIVER
1
2
3–7
8
9
ACK
REPEATED IF MORE BYTES
ARE TRANSFERRED
STOP
CONDITION
OR REPEATED
START
CONDITION
The expected output frequency is not exactly equal to the
desired frequency of 11.0592MHz. The difference is
450Hz. In terms of percentage, Equation 6 shows that the
expected error is 0.004%. The expected error assumes
typical values and does not include deviations from the
typical as specified in the electrical tables.
%ERROREXPECTED
=
fDESIRED − fEXPECTED
fDESIRED
× 100
(6)
%ERROREXPECTED
=
11.0592MHz − 11.05875MHz
11.0592MHz
×
100
= 450Hz × 100 = 0.004%
11.0592MHz
Example #2: Calculate the register values needed to
generate a desired output frequency of 50MHz.
Since the desired frequency is already within the valid
master oscillator frequency range, the prescaler is set
to divide by 1, and hence, PRESCALER = 0000h
(currently ignoring the other setting).
(7)
fMASTER OSCILLATOR = 50.0MHz x 20 = 50.0MHz
Next, looking at Table 2, OS + 1 provides a range of
frequencies centered around the desired frequency. To
determine what value to write to the OFFSET register,
the RANGE register must first be read. Assuming 12h
was read in this example, 13h (OS + 1) is written to the
OFFSET register.
Finally, the DAC value is calculated as shown in
Equation 8.
(8)
DAC VALUE = (50.0MHz − 48.6MHz) = 280.00 (decimal)
5kHz STEP SIZE
The result is then converted to hex (0118h) and then
left-shifted, resulting in 4600h to be programmed into
the DAC register.
In summary, the DS1086L is programmed as follows:
PRESCALER = 0000h
OFFSET = OS + 1 or 13h (if RANGE was read as 12h)
DAC = 4600h
fOUTPUT
=
(48.6MHz) + (280
20
×
5kHz)
=
(9)
50.0MHz = 50.0MHz
1
Since the expected output frequency is equal to the
desired frequency, the calculated error is 0%.
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