DS1680 查看數據表（PDF） - Dallas Semiconductor -> Maxim Integrated

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DS1680

Portable System Controller with Touch-Screen Control

Dallas Semiconductor -> Maxim Integrated 

DS1680

AIE (Alarm Interrupt Enable) – When set to a logic 1, this bit permits the interrupt request flag (IRQF)

bit in the status register to assert INT. When the AIE bit is set to logic 0, the IRQF bit does not initiate the

INT signal.

STATUS REGISTER – 0Ch

BIT 7

BIT 6

BIT 5

0

LOBAT

0

BIT 4

0

BIT 3

0

BIT 2

0

BIT 1

0

BIT 0

IRQF

LOBAT (Low Battery Flag) – This bit reflects the status of the backup power source connected to the

VBAT pin. When VBAT is greater than 2.5V, LOBAT is set to a logic 0. When VBAT is less than 2.3V,

LOBAT is set to a logic 1.

IRQF (Interrupt Request Flag) – A logic 1 in the interrupt request flag bit indicates that the current

time has matched the time of day alarm registers. If the AIE bit is also a logic 1, the INT pin will go high.

IRQF is cleared by reading or writing to any of the alarm registers.

POWER-UP/POWER-DOWN CONSIDERATIONS

When VCC is applied to the DS1680 and reaches a level greater than VCCTP (trip point), the device

becomes fully accessible after tRPU (250ms typical). Before tRPU elapses, some inputs are disabled. When

VCC drops below VCCSW, the device is switched over to the VBAT supply.

During power- up, when VCC returns to an in-tolerance condition, the RST pin is kept in the active state

for 250ms (typical) to allow the power supply and microprocessor to stabilize.

NONVOLATILE SRAM CONTROLLER

The DS1680 provides automatic backup and write protection for an external SRAM. This function is

provided by gating the chip-enable signal and by providing a constant power supply through the VCCO

pin.

The DS1680 nonvolatizes the external SRAM by write-protecting the SRAM and by providing a backup

power supply in the absence of VCC. When VCC falls below VCCTP, access to the external SRAM is

prohibited by forcing CE0 high regardless of the level of CEI . Upon power-up, access is prohibited until

the end of tRPU.

POWER-FAIL COMPARATOR

The PFI input is connected to an internal reference. If PFI is less than 1.25V, PFO goes low. The power-

fail comparator can be used as an undervoltage detector to signal an impending power supply failure.

PFO can be used as a µP interrupt input to prepare for power-down. For battery conservation, the

comparator is turned off and PFO is held low when in battery-backup mode.

ADDING HYSTERESIS TO THE POWER-FAIL COMPARATOR

Hysteresis adds a noise margin to the power-fail comparator and prevents PFO from oscillating when

VIN is near the power- fail comparator trip point. Figure 6 shows how to add hysteresis to the power- fail

comparator. Select the ratio of R1 and R2 such that PFI sees 1.25V when VIN falls to the desired trip

point (VTRIP). Resistors R2 and R3 adds hysteresis. R3 will typically be an order of magnitude greater

than R1 or R2. R3 should be chosen so it does not load down the PFO pin. Capacitor C1 adds noise

filtering and has a value of typically 1.0µF (See Figure 6 for a schematic diagram and equations.)

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