DS21T06 查看數據表（PDF） - Dallas Semiconductor -> Maxim Integrated
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DS21T06 Datasheet PDF : 6 Pages
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NOTES:
1. 4.00V < TERMPWR < 5.50V.
2. 0.0V < signal lines < TERMPWR.
3. All signal lines = 0.0V.
4. All signal lines open.
5. Power-down enabled; PD = 0.0V.
6. Guaranteed by design; not production tested.
7. VSIGNAL = 0.2V.
28–PIN SOIC (300 MIL)
The chamber on the body is optional. If it is not
present, a terminal 1 identifier must be
positioned so that ½ or more of its area is
contained in the hatched zone.
DS21T06
PKG
DIM
A IN.
MM
A1 IN.
MM
A2 IN.
MM
b IN.
MM
C IN.
MM
D IN.
MM
e IN.
MM
E1 IN.
MM
H IN.
MM
L IN.
MM
Θ
28-PIN
MIN MAX
0.094 0.105
2.39 2.67
0.004 0.012
0.102 0.30
0.089 0.095
2.26 2.41
0.013 0.020
0.33 0.51
0.009 0.013
0.229 0.33
0.698 0.712
17.73 18.08
0.050 BSC
1.27 BSC
0.290 0.300
7.37 7.62
0.398 0.416
10.11 10.57
0.016 0.040
0.40 1.02
0°
8°
6 of 6
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