DS2127(2004) 查看數據表（PDF） - Maxim Integrated
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DS2127 Datasheet PDF : 6 Pages
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Ultra3 LVD/SE SCSI 14-Line Terminator
2.2µF
TPWR
ISO
GND DIFFSENS
VREF DIFF_CAP
4.7µF
0.1µF
CONTROL LINES (9)
DATA LINES (4)
DIFFSENS
20kΩ
20kΩ
TPWR
ISO
2.2µF
DIFFSENS GND
DIFF_CAP VREF
0.1µF 4.7µF
2.2µF
TPWR DIFF_CAP
ISO
DIFFSENS
GND
VREF
4.7µF
DATA LINES (8) + PARITY
DATA LINES (4) + PARITY
DIFF_CAP TPWR
ISO
DIFFSENS
GND
VREF
4.7µF
2.2µF
Figure 2. Typical Operating Circuit
Detailed Description
The DS2127 provides dual-mode active terminators
with auto-switching SE and LVD termination for 14 SCSI
lines. The DIFFSENSE signal performs mode detection
and selection.
In LVD mode, the termination configuration is a y-type
terminator with a 105Ω differential resistance and a
150Ω common-mode resistance. The termination resis-
tor is biased with two current sources and the common-
mode node is connected to a 1.25V voltage regulator.
A fail-safe bias of 112mV is maintained when no drivers
are connected to the SCSI bus.
In SE mode, each negative signal input pin is connect-
ed to 2.85V through a 110Ω resistor.
In HVD mode, the termination resistors are isolated
from the SCSI bus and the resistor pins are left floating.
The voltage regulator is powered down and the VREF
pin is in a high-impedance state.
The DIFF_CAP pin is connected to the SCSI DIFFSENSE
line and monitors the voltage to determine the proper
operating mode of the device. Any DIFFSENSE voltage
below 0.5V indicates single ended; any DIFFSENSE volt-
age between 0.7V and 1.9V is LVD, and above 2.4V is
an HVD SCSI. On power-up, the DS2127 assumes SE
mode. If the voltage on the DIFF_CAP is between 0.7V
and 1.9V, the device waits tDELAY before entering the
LVD mode. The delay is the same when changing
modes. A new mode change can start at any time after a
previous mode change has been detected.
Typically, four DS2127s are used in a SCSI bus seg-
ment. On two chips, the DIFF_CAP inputs at each end
of the bus should be connected together. There should
be a 50Hz noise filter implemented on DIFF_CAP at
each end of the bus, as close as possible to the
DIFF_CAP pins. This filter consists of a 20kΩ resistor
between the DIFFSENS and DIFF_CAP pins, and a
0.1µF capacitor from DIFF_CAP to GND. See Figure 2
for the typical operating circuit.
When ISO is connected to TPWR, the termination pins
are isolated from the SCSI bus and VREF becomes
inactive, and the device is in a low-power state. During
thermal shutdown, the termination pins are isolated
from the SCSI bus and VREF becomes high impedance.
The DIFFSENS driver is shut down during either of
these two events. LVD and SE signals indicate whether
the SCSI bus segment is in LVD or SE mode.
Chip Information
TRANSISTOR COUNT: 8114 CMOS and 87 Bipolar
PROCESS: BiCMOS
SUBSTRATE CONNECTED TO GROUND
Thermal Information
Thermal Resistance (junction-to-ambient):
θJA = +29°C/W
Thermal Resistance (junction-to-case):
θJC = +10°C/W
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