DS2422S 查看數據表（PDF） - Dallas Semiconductor -> Maxim Integrated

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DS2422S

1-Wire Temperature/Datalogger with 8kB Datalog Memory

Dallas Semiconductor -> Maxim Integrated 

DS2422

MEMORY

The memory map of the DS2422 is shown in Figure 7. The 512 bytes general-purpose SRAM are located in pages

0 through 15. The various registers to set up and control the device fill page 16 and 17, called Register Pages 1

and 2 (details in Figure 8). Pages 18 and 19 provide storage space for calibration data. They can alternatively be

used as extension of the general-purpose memory. The Trim Register Page holds registers that are used to tune

the timing of the serial data interface and to trim the on-chip temperature converter. The "datalog" logging memory

starts at address 1000h (page 128) and extends over 256 pages. The memory pages 20 to 31 and 33 to 127 are

reserved for future extensions. The scratchpad is an additional page that acts as a buffer when writing to the SRAM

memory or the register page. The data- and calibration memory can be written at any time. The access type for the

two register pages and the Trim Register Page is register-specific and depends on whether the device is pro-

grammed for a mission. Figures 8A and 8B show the details. The datalog memory is read-only for the user. It is

written solely under supervision of the on-chip control logic. Due to the special behavior of the write access logic

(write scratchpad, copy scratchpad) it is recommended to only write full pages at a time. This also applies to all the

register pages and the calibration memory. See section Address Register and Transfer Status for details.

Figure 8A. DS2422 Register Pages Map

ADDR

b7

b6

b5

b4

b3

b2

b1

0200h

0

10 Seconds

Single Seconds

0201h

0

10 Minutes

Single Minutes

0202h

0

12/24

20h.

AM/PM

10h.

Single Hours

0203h

0

0

10 Date

Single Date

0204h CENT

0

0

10m.

Single Months

0205h

10 Years

Single Years

0206h

Low Byte

0207h

0

0

High Byte

0208h

Low Threshold

0209h

High Threshold

020Ah

Low Threshold

020Bh

High Threshold

020Ch

Low Byte

0

0

0

0

020Dh

High Byte

020Eh

Low Byte

020Fh

High Byte

0210h

0

0

0

0

0

0

ETHA

0211h

1

1

1

1

1

1

EDHA

0212h

0

0

0

0

0

0

EHSS

0213h

1

1

SUTA

RO

DLFS TLFS EDL

0214h BOR

1

1

1

DHF

DLF

THF

0215h

1

1

0

WFTA MEMC

0

MIP

LR

0216h

Low Byte

0217h

Center Byte

0218h

High Byte

0219h

0

10 Seconds

Single Seconds

021Ah

0

10 Minutes

Single Minutes

021Bh

0

12/24

20h.

AM/PM

10h.

Single Hours

021Ch

0

0

10 Date

Single Date

021Dh CENT

0

0

10m.

Single Months

021Eh

10 Years

Single Years

021Fh

(no function; reads 00h)

0220h

Low Byte

0221h

Center Byte

0222h

High Byte

0223h

Low Byte

0224h

Center Byte

0225h

High Byte

0226h

Configuration Code

0227h

EPW

b0

Function

Real-

Time Clock

Registers

0

ETLA

EDLA

EOSC

ETL

TLF

0

Sample

Rate

Temp.

Alarms

Data

Alarms

Latest

Temp.

Latest

Data

T.Alm.En.

D.Alm.En.

RTC En.

Mis. Cntrl.

Alm. Stat.

Gen. Stat.

Start

Delay

Counter

Mission

Time

Stamp

(N/A)

Mission

Samples

Counter

Device

Samples

Counter

Flavor

PW. Cntrl.

Access*

R/W; R

R/W; R

R/W; R

R/W; R

R; R

R; R

R/W; R

R/W; R

R/W; R

R/W; R

R; R

R; R

R/W; R

R; R

R; R

R; R

R; R

R; R

R/W; R

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