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DS2715 查看數據表(PDF) - Maxim Integrated

零件编号
产品描述 (功能)
比赛名单
DS2715
MaximIC
Maxim Integrated MaximIC
DS2715 Datasheet PDF : 17 Pages
First Prev 11 12 13 14 15 16 17
DS2715: NiMH Battery Pack Charge Controller
The RT resistor (R5) is set to 47kfor a timeout of 70 minutes. This would be appropriate for cells with a capacity
of about 1Ah when charged with the 1.07A charge current. The resistor divider with R12 and R13 is configured to
present the voltage equivalent to a single cell on the Vbatt pin.
The value of L1 in the example represents a moderate switching speed of 100-150khz for fast-charge mode. L1
may be adjusted to fit specific application goals as long as the associated change in switching speed does not
exceed the circuit’s ability to maintain proper regulation of the sense resistor voltage. Since TOPOFF and
PRECHARGE modes have a faster switching frequency than FAST-CHARGE, the regulation in these modes must
be considered.
All capacitors should be ceramic surface mount types of good quality where possible. The 47uF capacitor may be
any type that meets the application requirements. A different network for C1 and C2 may be necessary depending
on the types of capacitors used, the layout, and the transient requirements of the application load. All resistors not
previously mentioned are standard surface mount types.
Linear
Figure 6 shows a typical application circuit for charging a 3-cell stack in linear mode. The Mode pin is tied to VSS for
linear operation. A 250msense resistor (R7) sets the charge current to .484A, which the DS2715 regulates by
controlling the VGS of Q1 through the bias resistor R3. The bias resistor should be chosen so that the current that
VCH is required to sink does not exceed 20mA when VCH is fully turned on. The preferred design target for FAST-
CHARGE conditions is 10mA. The RC network of R3 and C5 set a pole in the control loop to ensure stability.
Figure 6. TYPICAL Linear APPLICATION CIRCUIT FOR A 3-CELL STACK
+6VDC
D1
B340A-13
LOAD
D2 R2 220
R1
150
C1 C2
47 uF 1 uF
C3
.1 uF
Q2
2N7002
C5 4.7 uF
Q1
IRF9Z24
LED1 R3 470
U1
R4 470
LED1
Vdd
Rt
DS2715
Vch Vbatt
Div
R5 86K
R10
SNS+
10K
Cbias
Mode
THM
VSS CTG SNS-
R8
10k
C4
0.1 uF
R12
200K
R13
100K
THM1
10K
R7 0.25
A lower charge current is used for linear mode, in addition to a lower supply voltage. This reduces the power
dissipation of Q1 to a manageable level. This dissipation must be closely considered in the application and proper
heatsinking precautions must be taken. Different transistors may be selected for Q1 based on package size and
thermal requirements. An 86kresistor on RT (R5) sets the FAST-CHARGE timeout to about 129 minutes, which
for the given charge rate is appropriate for cells of about .9Ah capacity. The other aspects of the circuit are
equivalent to those of the switchmode circuit.
14 of 17

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