EDS2504APTA-TI 查看數據表（PDF） - Elpida Memory, Inc

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EDS2504APTA-TI

256M bits SDRAM WTR (Wide Temperature Range)

Elpida Memory, Inc 

EDS2504APTA/08APTA/16APTA-TI

Row address strobe and bank activate [ACT]

This command activates the bank that is selected by BA0, BA1 and determines the row address (AX0 to AX12).

(See Bank Select Signal Table)

Precharge selected bank [PRE]

This command starts precharge operation for the bank selected by BA0, BA1. (See Bank Select Signal Table)

[Bank Select Signal Table]

BA0

BA1

Bank 0

L

L

Bank 1

H

L

Bank 2

L

H

Bank 3

H

H

Remark: H: VIH. L: VIL. ×: VIH or VIL

Precharge all banks [PALL]

This command starts a precharge operation for all banks.

Refresh [REF/SELF]

This command starts the refresh operation. There are two types of refresh operation, the one is auto-refresh, and

the other is self-refresh. For details, refer to the CKE truth table section.

Mode register set [MRS]

The SDRAM has a mode register that defines how it operates. The mode register is specified by the address pins

(A0 to BA0 and BA1) at the mode register set cycle. For details, refer to the mode register configuration. After

power on, the contents of the mode register are undefined, execute the mode register set command to set up the

mode register.

Preliminary Data Sheet E0248E10 (Ver. 1.0)

16

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