HCC4076B 查看數據表（PDF） - STMicroelectronics
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HCC4076B Datasheet PDF : 13 Pages
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LOGIC DIAGRAM
HCC/HCF4076B
TRUTH TABLE
RESET
1
CLOCK
X
DATA INPUT DISABLE
G1
G2
X
X
DATA
D
X
NEXT STATE
OUTPUT G
0
0
0
X
X
X
Q
NC
0
1
X
X
Q
NC
0
X
1
X
Q
NC
0
0
0
1
1
0
0
0
0
0
0
1
X
X
X
Q
NC
0
X
X
X
Q
NC
When either Output DisableM or Nis high, theoutputs aredisablesd (high impedance state): however sequential operation of the flip-flopisnot affected.
1 = High Level, 0 = Low Level, X = Don’t Care, NC = No Change
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