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MD56V62320 查看數據表(PDF) - Oki Electric Industry

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MD56V62320 Datasheet PDF : 30 Pages
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E2G1057-29-41
¡ ¡ SemicondSucetormiconductor
This versionM: DA5p6rV. 1692939P2r0eliminary
MD56V62320
4-Bank ¥ 524,288-Word ¥ 32-Bit SYNCHRONOUS DYNAMIC RAM
DESCRIPTION
The MD56V62320 is a 4-bank ¥ 524,288-word ¥ 32-bit synchronous dynamic RAM, fabricated in
Oki's CMOS silicon-gate process technology. The device operates at 3.3 V. The inputs and
outputs are LVTTL compatible.
FEATURES
• Silicon gate, quadruple polysilicon CMOS, 1-transistor memory cell
• 4-bank ¥ 524,288-word ¥ 32-bit configuration
• 3.3 V power supply, ±0.3 V tolerance
• Input : LVTTL compatible
• Output : LVTTL compatible
• Refresh : 4096 cycles/64 ms
• Programmable data transfer mode
CAS latency (2, 3)
– Burst length (2, 4, 8)
– Data scramble (sequential, interleave)
• CBR auto-refresh, Self-refresh capability
• Package:
86-pin 400 mil plastic TSOP (Type II) (TSOPII86-P-400-0.50-K) (Product : MD56V62320-xxTA)
xx indicates speed rank.
PRODUCT FAMILY
Family
MD56V62320-10
Max.
Frequency
100 MHz
Access Time (Max.)
tAC2
tAC3
9 ns
9 ns
1/29

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