FSL126HR 查看數據表（PDF） - Fairchild Semiconductor
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FSL126HR Datasheet PDF : 13 Pages
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Pin Configuration
Figure 3. Pin Configuration
Pin Definitions
Pin #
1
2
3
4
5
6, 7, 8
Name
GND
VCC
VFB
IPK
VSTR
Drain
Description
Ground. SenseFET source terminal on the primary side and internal control ground.
Positive Supply Voltage Input. Although connected to an auxiliary transformer winding,
current is supplied from pin 5 (VSTR) via an internal switch during startup (see Figure 2). Once
VCC reaches the UVLO upper threshold (12V), the internal startup switch opens and device
power is supplied via the auxiliary transformer winding.
Feedback Voltage. The non-inverting input to the PWM comparator, it has a 0.4mA current
source connected internally, while a capacitor and opto-coupler are typically connected
externally. There is a delay while charging external capacitor CFB from 2.4V to 6V using an
internal 5µA current source. This delay prevents false triggering under transient conditions, but
still allows the protection mechanism to operate under true overload conditions.
Peak Current Limit. Adjusts the peak current limit of the SenseFET. The feedback 0.4mA
current source is diverted to the parallel combination of an internal 6kΩ resistor and any
external resistor to GND on this pin to determine the peak current limit.
Startup. Connected to the rectified AC line voltage source. At startup, the internal switch
supplies internal bias and charges an external storage capacitor placed between the VCC pin
and ground. Once VCC reaches 12V, the internal switch is opened.
Drain. Designed to connect directly to the primary lead of the transformer and capable of
switching a maximum of 650V. Minimizing the length of the trace connecting these pins to the
transformer decreases leakage inductance.
© 2011 Fairchild Semiconductor Corporation
FSL126HR • Rev. 1.0.0
3
www.fairchildsemi.com
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