GS1503 查看數據表（PDF） - Gennum -> Semtech
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GS1503 Datasheet PDF : 83 Pages
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1.5.7 TRS Word Insertion
When TRS_INS bit 0 of Host Interface register 008h is set
HIGH, the GS1503 will insert TRS codes into the video data
stream. When set LOW, existing TRS codes will remain in
the output video stream.
When EXT_SEL bit 3 of Host Interface register 001h is set
HIGH, TRS codes will be inserted based on the timing of
EXTH and EXTF input signals.
Register Settings
NAME
TRS_INS
DESCRIPTION
TRS word insertion (1: Enabled)
ADDRESS
008
BIT
SETTING DEFAULT
0
1
1
1.6 AUDIO DATA PROCESSING
1.6.1 Digital Audio Input Format
The GS1503 will accept two audio input formats, AES/EBU
digital audio input and serial input, as listed in Table 3.
Serial input can be formatted in the following two modes.
See Figure 19:
24-bit Left Justified; MSB first
24-bit Right Justified; MSB last
The audio input format is configured using the AM[1:0]
external pins or via AM[1:0] bits 1-0 in Host Interface
register 010h. To configure the audio input format via the
Host Interface, AM_SEL bit 7 in Host Interface register 010h
must be set HIGH. The GS1503 will default to the AM[1:0]
external pin setting.
Table 3: Audio Input Formats
AM[1:0]
AUDIO INPUT FORMAT
0
Serial audio input: 24-bit Left Justified; MSB first
1
Serial audio input: 24-bit Right Justified; MSB last
2
AES/EBU audio input
Register Settings
NAME
AM_SEL
AM[1:0]
DESCRIPTION
0: External pin setting
1: Register setting
Audio input format selection (AM[1] is MSB)
ADDRESS
BIT
010
7
1-0
SETTING
1
DEFAULT
0
See
0
Table 3
WCINA/WCINB
MODE0
MSB
23
MODE1
MODE2
(AES/EBU)
0
34
Sync
Preamble
Channel 1
MSB
0
23
LSB
0
23
24-bit Audio Sample Word
2728293031 0
34
V
UCP
Sync
Preamble
Validity Bit
User Data Bit
Channel Status Bit
Parity Bit
Fig. 19 Audio Input Formats
Channel 2
0
LSB
0
24-bit Audio Sample Word
23
2728293031
V UCP
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