GS1582 查看數據表（PDF） - Gennum -> Semtech

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GS1582

Multi-Rate Serializer with Cable Driver, Audio Multiplexer and ClockCleaner™

Gennum -> Semtech 

Table 1-1: Pin Descriptions (Continued)

Pin

Number

J4

J5

J6

J7

J9

J10

Name

Timing

Type Description

AIN_5/6

WCLK_2

AIN_1/2

WCLK_1

SDOUT_TDO

SCLK_TCK

Synchronous

with ACLK_2

Clock

Synchronous

with ACLK_1

Clock

Synchronous

with

SCLK_TCK

Non

Synchronous

Input

Input

Input

Input

Output

Input

Serial Audio Input; Channels 5 and 6.

48kHz word clock for Audio Group 2.

Serial Audio Input; Channels 1 and 2.

48kHz word clock for Audio Group 1.

COMMUNICATION SIGNAL OUTPUT

Signal levels are LVCMOS/LVTTL compatible.

Serial Data Output / Test Data Output

Host Mode (JTAG/HOST = LOW)

This pin operates as the host interface serial output, used to read

status and configuration information from the internal registers of

the device.

JTAG Test Mode (JTAG/HOST = HIGH)

This pin is used to shift test results and operates as the JTAG test

data output, TDO.

NOTE: If the host interface is not being used leave this pin

unconnected.

IO_VDD = 3.3V

Drive Strength = 12mA

IO_VDD = 1.8V

Drive Strength = 4mA

COMMUNICATION SIGNAL INPUT

Signal levels are LVCMOS/LVTTL compatible.

Serial Data Clock / Test Clock.

Host Mode (JTAG/HOST = LOW)

SCLK_TCK operates as the host interface burst clock, SCLK.

Command and data read/write words are clocked into the device

synchronously with this clock.

JTAG Test Mode (JTAG/HOST = HIGH)

This pin is the TEST MODE START pin, used to control the operation

of the JTAG test clock, TCK.

NOTE: If the host interface is not being used, tie this pin HIGH.

GS1582 Multi-Rate Serializer with Cable Driver, Audio

Multiplexer and ClockCleanerTM

Data Sheet

40117 - 4

December 2011

17 of 115

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