GS9023B 查看數據表（PDF） - Gennum -> Semtech
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GS9023B Datasheet PDF : 56 Pages
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Table 3-1: Video Input Formats
Video Standard
525/D2 (SMPTE259M)
525/D2 (SMPTE244M)
525/D1
Reserved
525/16:9
Reserved
525/4:4:4:4 (System #1)
Reserved
625/D2 (with TRS)
625/D2 (without TRS)
625/D1
Reserved
625/16:9
Reserved
625/4:4:4:4 (System #2)
625/4:2:2P (System #4)
Serial Digital
Data Rate
(Mbps)
143
143
270
–
360
–
540
–
177
177
270
–
360
–
540
540
PCLK
Frequency
(MHz)
14.3
14.3
27.0
–
36.0
–
54.0
–
17.7
17.7
27.0
–
36.0
–
54.0
54.0
VM[2] or
“VMOD[2]”
VM[1] or
“VMOD[1]”
VM[0] or
“VMOD[0]”
TRS or
“D2_TRS”
0
0
0
0
0
0
0
1
0
0
1
0
0
0
1
1
0
1
0
0
0
1
0
1
0
1
1
0
0
1
1
1
1
0
0
0
1
0
0
1
1
0
1
0
1
0
1
1
1
1
0
0
1
1
0
1
1
1
1
0
1
1
1
1
3.1.2.1 Synchronous Switch of Video Input
When a 525-line video input to the GS9023B undergoes a synchronous switch between
two video sources, the two video sources may have 5-frame sequences which are not
aligned. In this case, the GS9023B may not correctly detect the new 5-frame sequence,
and the internal FIFO may overflow/underflow continuously. To avoid this problem, it
is recommended that the user sets bits 5, 6, and 7 of Host Interface Register #2h HIGH
(see bit descriptions in Table 4-1). Setting these bits HIGH will permit the device to reset
the internal audio sample buffer when an overflow/underflow condition is detected and
mute the embedded audio packets during this reset.
GS9023B GENLINX® II GS9023B Embedded Audio
CODEC
Data Sheet
37954 - 2
December 2009
16 of 56
Proprietary & Confidential
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