25255 查看數據表（PDF） - Intersil

零件编号

产品描述 (功能)

比赛名单

25255

20MHz, High Slew Rate, Uncompensated, High Input Impedance, Operational Amplifiers

Intersil 

Schematic Diagram

HA-2520, HA-2522, HA-2525

OFFSET-

PIN 1

BAL 1

OFFSET+

BAL 2

Q30

Q29

+INPUT

R13

Q28

R16

Q27

R15

R11

Q16

200

R2AA

R21

440

1.8k

R2A

Q3A

Q4A

Q1A

Q2A

200

R2BB

R10

440

1.8k

R2B

Q3B

Q4B

Q2B

Q1B

Q17

Q31

Q26

Q25

Q18

Q19

Q20

R1A

R1B

Q24

Q21A

R6A

Q22

Q21B

R6B

COMP

V+

R12

C1

1pF

Q23

Q8

Q11B

Q7

Q15

R9

D138

R17

50

Q12B

Q12A

OUTPUT

R18

30

D13A

Q6

Q5A

R3A

Q5B

R3B

Q10

R19

Q11A

Q9

D14

R10

V-

-INPUT

Typical Application

Inverting Unity Gain Circuit

Figure 6 shows a Compensation Circuit for an inverting unity

gain amplifier. The circuit was tested for functionality with

supply voltages from ±4V to ±15V, and the performance as

tested was: Slew Rate ≈ 120V/µs; Bandwidth ≈ 10MHz; and

Settling Time (0.1%) ≈ 500ns. Figure 7 illustrates the amplifier’s

frequency response, and it is important to note that capacitance

at pin 8 must be minimized for maximum bandwidth.

10k

10k

IN

2k

500pF

-

+

OUT

HA-2520

5k

FIGURE 6. INVERTING UNITY GAIN CIRCUIT

15

10

5

GAIN

0

0

-5

-45

PHASE

-10

-90

-15

-135

-180

10k

100k

1M

10M

FIGURE 7. FREQUENCY RESPONSE FOR INVERTING UNITY

GAIN CIRCUIT

5

FN2894.9

February 16, 2009

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