HCA10009 查看數據表（PDF） - Intersil
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HCA10009 Datasheet PDF : 10 Pages
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HCA10009
Application Information
Operation at Various Supply Voltages
The HCA10009 operates over a wide range of supply
voltages with little variation in performance. The supplies
may be varied from ±5V to ±15V. See Typical Performance
Curves for variations in supply current, slew rate and output
voltage swing.
Offset Adjustment
The following diagram shows the offset voltage adjustment
configuration for the HCA10009. By moving the
potentiometer wiper towards pin 8 (+BAL), the op amps
output voltage will increase; towards pin 1 (-BAL) decreases
the output voltage. A 20kΩ trim pot will allow an offset
voltage adjustment of about 10mV.
+15V
7
2
RP
1
8
6
3
+
4
-15V
Capacitive Loading Considerations
When driving capacitive loads >80pF, a small resistor, 50Ω
to 100Ω, should be connected in series with the output and
inside the feedback loop.
Typical Performance Curves VS = ±15V, TA = 25oC
Saturation Recovery
When an op amp is over driven, output devices can saturate
and sometimes take a long time to recover. By clamping the
input, output saturation can be avoided. If output saturation
can not be avoided, the maximum recovery time when
overdriven into the positive rail is 10.6µs. When driven into
the negative rail the maximum recovery time is 3.8µs.
Input Protection
The HCA10009 has built in back-to-back protection diodes
which limit the maximum allowable differential input voltage
to approximately 5V. If the HCA10009 will be used in circuits
where the maximum differential voltage may be exceeded,
then current limiting resistors must be used. The input
current should be limited to a maximum of 10mA.
RLIMIT2
∆VIN
RLIMIT3
6
+
VOUT
PC Board Layout Guidelines
When designing with the HCA10009, good high frequency
(RF) techniques should be used when building a PC board.
Use of ground plane is recommended. Power supply
decoupling is very important. A 0.01µF to 0.1µF high quality
ceramic capacitor at each power supply pin with a 2.2µF to
10µF tantalum close by will provide excellent decoupling.
Chip capacitors produce the best results due to ease of
placement next to the op amp and basically no lead
inductance. If leaded capacitors are used, the leads should
be kept as short as possible to minimize lead inductance.
RL = 1K, CL = 50pF
120
100
80
GAIN
60
40
20
180
0
135
PHASE
90
45
0
1K
10K
100K
1M
10M
100M
FREQUENCY (Hz)
FIGURE 5. OPEN LOOP GAIN AND PHASE vs FREQUENCY
12
9 AV = +1, RL = 1K, CL = 50pF
6
3
GAIN
0
-3
-6
PHASE
10K
100K
1M
10M
FREQUENCY (Hz)
180
135
90
45
0
100M
FIGURE 6. CLOSED LOOP GAIN vs FREQUENCY
4-5
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