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HD61203UFS(1999) 查看數據表(PDF) - Hitachi -> Renesas Electronics

零件编号
产品描述 (功能)
比赛名单
HD61203UFS
(Rev.:1999)
Hitachi
Hitachi -> Renesas Electronics Hitachi
HD61203UFS Datasheet PDF : 30 Pages
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Terminal
Name
FRM
M
CL2
DL, DR
NC
SHL
Number of
Terminals
1
1
1
2
5
1
HD61203U
I/O Connected to Functions
O HD61202U Frame signal
Master mode
Connect this terminal to terminal FRM of the
HD61202U.
Slave mode
Don’t connect any lines to this terminal.
I/O MB of
Signal to convert LCD driver signal into AC
HD61830 or M Master mode: Output terminal
of HD61202U
Connect this terminal to terminal M of the
HD61202U.
Slave mode: Input terminal
Connect this terminal to terminal MB of the
HD61830.
I/O CL1 or MA of Shift clock
HD61830 or
CL of
HD61202U
Master mode: Output terminal
Connect this terminal to terminal CL of the
HD61202U.
Slave mode: Input terminal
Connect this terminal to terminal CL1 or MA of
the HD61830.
I/O Open or FLM Data I/O terminals of bidirectional shift register
of HD61830 DL corresponds to X1’s side and DR to X64’s side.
Master mode
Output common scanning signal. Don’t connect
any lines to these terminals normally.
Slave mode
Connect terminal FLM of the HD61830 to DL
(when SHL = VCC) or DR (when SHL = GND).
M/S
VCC
GND
SHL
VCC
GND
VCC
GND
DL
Output Output Input Output
DR
Output Output Output Input
Open
Not used.
Don’t connect any lines to this terminal.
I
VCC or GND Selects shift direction of bidirectional shift register.
Common
SHL
Shift Direction
Scanning Direction
VCC
GND
DL DR
DL DR
X1 X64
X1 X64
11

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