HD74LS641FPEL 查看數據表（PDF） - Renesas Electronics

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比赛名单

HD74LS641FPEL

Octal Bus Transceivers (non-inverted open-collector outputs)

Renesas Electronics 

HD74LS641

Testing Method

Test Circuit

4.5V

P.G.

Zout = 50Ω

Input

VCC

G

DIR

1A S1

RL

Output

1B

CL

Notes:

1. 2A-2B, 3A-3B, 4A-4B, 5A-5B, 6A-6B, 7A-7B, 8A-8B, are identical to abobe load circuit.

2. CL includes prove and jig capacitance.

3. S1 is a input-output switch.

Waveforms 1

Input A

(or B)

tTLH

90 %

1.3 V

10 %

Output B

(or A)

tPLH

1.3 V

tTHL

90 %

1.3 V

10 %

tPHL

Note: Input pulse: tTLH ≤ 15 ns, tTHL ≤ 6 ns, PRR = 1 MHz, duty cycle 50%

3V

0V

VOH

1.3 V

VOL

Rev.2.00, Feb.18.2005, page 4 of 6

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