HD74LS73A 查看數據表（PDF） - Renesas Electronics

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HD74LS73A

Dual J-K Flip-Flops(with Preset/ Common Clear/ and Common Clock)

Renesas Electronics 

HD74LS73A

Waveforms 1

Clock

Q

10%

tTLH

tTHL

90% 90%

1.3 V 1.3 V

tw(H)

tw(L)

10%

tPLH

1.3 V 1.3 V

tPHL

1.3 V

tPHL

1.3 V

tPLH

3V

0V

VOH

VOL

Note:

Q

VOH

1.3 V

1.3 V

VOL

Clock input pulse; tTLH ≤ 15 ns, tTHL ≤ 6 ns, PRR = 1 MHz, duty cycle = 50% and for fmax,

tTLH = tTHL ≤ 2.5 ns

Waveforms 2

Clear

Clock

tTHL

tTLH

90%

1.3V

10%

tw (CLR)

90%

1.3V

10%

tPHL

3V

0V

tTLH

tTHL

10%

90% 90%

1.3V 1.3V

tw (CK) ≥ 20ns

3V

10%

0V

Q

1.3V

tPLH

VOH

VOL

VOH

1.3V

Q

VOL

Note: Crear and clock input pulse; tTLH ≤ 15 ns, tTHL ≤ 6 ns, PRR = 1 MHz,

Rev.3.00, Jul.22.2005, page 5 of 6

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