HD74LVC1G57 查看數據表（PDF） - Renesas Electronics
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HD74LVC1G57 Datasheet PDF : 10 Pages
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HD74LVC1G57
Function Selection Table
Logic Function
2–input AND
1
2–input AND with both inputs inverted
4
2–input NAND with one input inverted
2, 3
2–input OR with one input inverted
2, 3
2–input NOR
4
2–input NOR with both inputs inverted
1
2–input EX–NOR
5
Logic Configurations
VCC
A
B
A
1 (IN1) (IN2) 6
B
Y
A
A
B
Y
2 (GND) (VCC) 5
3 (IN0) (Y) 4
Y
B
A
B
Figure 1. 2–inputs AND Gate
VCC
A
B
A
B
1 (IN1) (IN2) 6
B
Y
2 (GND) (VCC) 5
Y
A
3 (IN0) (Y) 4
Y
A
B
A
B
Figure 3. 2–inputs NAND Gate
with B input inverted
VCC
A
1 (IN1) (IN2) 6
B
A
B
Y
2 (GND) (VCC) 5
3 (IN0) (Y) 4
Y
Figure 5. 2–inputs EX–NOR Gate
Figure No.
VCC
A
1 (IN1) (IN2) 6
B
Y
2 (GND) (VCC) 5
Y
3 (IN0) (Y) 4
Y
Figure 2. 2–inputs NAND Gate
with A input inverted
VCC
1 (IN1) (IN2) 6
B
Y
2 (GND) (VCC) 5
Y
A
3 (IN0) (Y) 4
Y
Figure 4. 2–inputs NOR Gate
Rev.3.00 Jun. 29, 2004 page 3 of 9
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