HIP4080AIB(1995) 查看數據表（PDF） - Intersil

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HIP4080AIB
(Rev.:1995)

80V/2.5A Peak, High Frequency Full Bridge FET Driver

Intersil 

Timing Diagrams

U/V = DIS 0

HEN 1

IN+ > IN-

THPHL

ALO

AHO

BLO

BHO

TLPHL

HIP4080A

TDT

TLPLH

THPLH

TDT

TR

TF

(10% - 90%) (90% - 10%)

FIGURE 1. BISTATE MODE

U/V = DIS 0

HEN

IN+ > IN-

ALO

AHO

BLO

BHO

THEN-PHL

THEN-PLH

FIGURE 2. HIGH SIDE CHOP MODE

U/V or DIS

HEN

IN+ > IN-

ALO

AHO

BLO

BHO

TDLPLH

TREF-PW

TDIS

TUEN

FIGURE 3. DISABLE FUNCTION

6

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