HIP4084 查看數據表（PDF） - Intersil
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HIP4084 Datasheet PDF : 6 Pages
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HIP4084
Electrical Specifications
VDD = VxHB = 12V, VSS = VxHS = 0V, RDEL = 20K, UVLO/EN = ∞, Gate Capacitance (CGATE) = 1000pF
TJ = 25oC
TJ = -40oC TO
150oC
PARAMETER
TEST CONDITIONS
MIN
TYP MAX MIN
MAX UNITS
Peak Pulse Pulldown Current
VOUT 12V to 4V
0.7
1.1
1.5
0.5
1.7
A
Switching Specifications VDD = VxHB = 12V, VSS = VxHS = 0V, RDEL = 10K, Gate Capacitance (CGATE) = 1000pF
TJ = 25oC
TJ
= -40oC
150oC
TO
PARAMETER
TEST CONDITIONS
MIN TYP MAX MIN MAX UNITS
TURN ON DELAY AND PROPAGATION DELAY
Dead Time
Dead Time Channel Matching
Lower Turn-Off Propagation Delay
(xLI-xLO)
RDEL = 100K
RDEL = 10K
RDEL = 10K
No Load
3.8
4.5
6
3
7
µs
0.38
0.5
0.65
0.3
0.7
µs
-
7
15
-
20
%
-
25
50
-
70
ns
Upper Turn-Off Propagation Delay
(xHI-xHO)
No Load
-
55
80
-
100
ns
Lower Turn-On Propagation Delay
(xLI-xLO)
No Load
-
40
85
-
100
ns
Upper Turn-On Propagation Delay
(xHI-xHO)
No Load
-
75
110
-
150
ns
Rise Time
Fall Time
Turn-On Input Pulse Width
CGATE = 1000pF
CGATE = 1000pF
-
20
40
-
50
ns
-
10
20
-
25
ns
50
-
-
50
-
ns
Turn-Off Input Pulse Width
50
-
-
50
-
ns
Disable (EN) Turn-Off Propagation Delay
(EN - xLO)
-
50
80
90
ns
Disable (EN) Turn-Off Propagation Delay
(EN - xHO)
-
75
100
-
125
ns
Enable to Lower Turn-On Propagation Delay
(EN - xLO)
-
50
80
-
100
ns
Enable to Upper Turn-On Propagation Delay
(EN- xHO)
RDEL = 10K
-
1.2
2
-
3
µs
Refresh Pulse Width (xLO)
375
580
900
350
950
µs
4
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