HT49RV3 查看數據表（PDF） - Holtek Semiconductor

零件编号

产品描述 (功能)

比赛名单

HT49RV3

VFD Type 8-Bit MCU

Holtek Semiconductor 

HT49RV3/HT49CV3

Once an interrupt subroutine is serviced, all other inter-

rupts are blocked (by clearing the EMI bit). This scheme

may prevent any further interrupt nesting. Other inter-

rupt requests may take place during this interval, but

only the interrupt request flag will be recorded. If another

interrupt requires servicing while the program is in the

interrupt service routine, the programmer should set the

EMI bit and the corresponding bit of the INTC0 or INTC1

to allow interrupt nesting. Once the stack is full, the inter-

rupt request will not be acknowledged, even if the related

interrupt is enabled, until the SP is decremented. If imme-

diate service is desired, the stack should be prevented

from becoming full.

All these interrupts can support a wake-up function. As

an interrupt is serviced, a control transfer occurs by

pushing the contents of the Program Counter onto the

stack followed by a branch to a subroutine at the speci-

fied location in the ROM. Only the contents of the Pro-

gram Counter is pushed onto the stack. If the contents of

the register or of the status register (STATUS) is altered

by the interrupt service program which corrupts the de-

sired control sequence, the contents should be saved in

advance.

Bit No.

0

1

2

3

4

5

6

7

Label

EMI

EEI0

EEI1

ET0I

EIF0

EIF1

T0F

¾

Function

Controls the master or global interrupt (1=enable; 0=disable)

Controls the external interrupt 0 (1=enable; 0=disable)

Controls the external interrupt 1 (1=enable; 0=disable)

Controls the Timer/Event Counter 0 interrupt (1=enable; 0=disable)

External interrupt 0 request flag (1=active; 0=inactive)

External interrupt 1 request flag (1=active; 0=inactive)

Internal Timer/Event Counter 0 request flag (1=active; 0=inactive)

Unused bit, read as ²0²

INTC0 (0BH) Register

Bit No.

0

1

2

3, 7

4

5

6

Label

ET1I

ESII

EMFI

¾

T1F

SIF

MFF

Function

Controls the Timer/Event Counter 1 interrupt (1=enable; 0=disable)

Controls the serial interface interrupt (1=enabled; 0:disabled)

Controls the real multi-function interrupt (1=enable; 0:disable)

Unused bit, read as ²0²

Internal Timer/Event Counter 1 request flag (1=active; 0=inactive)

Serial interface data transferred or data received interrupt request flag (1=active; 0=inactive)

Multi-function interrupt request flag (1=active; 0=inactive)

INTC1 (1EH) Register

Bit No.

0

1

2

3

4

5

6

7

Label

Function

¾ Unused bit, read as ²0²

ERMT0 Controls the remote control timer rising edge interrupt (1=enable; 0=disable)

ERMT1 Controls the remote control timer falling edge interrupt (1=enable; 0=disable)

ERMTV Controls the remote control timer overflow interrupt (1=enable; 0=disable)

RME

Controls the remote control timer (1=enable; 0=disable)

1=enable & start counting; 0= disable & clear counter to 0

RMCS

RMS0

RMS1

Selects the remote control timer clock source fX (1=fSYS; 0=fSYS/4)

Selects the remote control timer clock

00=fX/25

01= fX/26

10= fX/27

11= fX/28

RMTC (21H) Register

Rev. 1.30

10

March 20, 2007

Share Link: