HT7612 查看數據表（PDF） - Holtek Semiconductor

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HT7612

General Purpose PIR Controller

Holtek Semiconductor 

HT7612/HT7612B

LVD & CDS Detecting Circuit

The external and internal detecting circuits for LVD and

CDS are shown in Fig.13. When the input voltage VLVD

is lower than 1.1V, the comparator outputs a low level

which means that VDD is lower than the minimum oper-

ating voltage (Vmin). When VCDS is lower than VL, the

comparator outputs a high level which means that it is

daytime, otherwise it is night.

Where

V LVD =

R LVD

R LVD + R X

V DD

V CDS=

R CDS

R CDS+ R Y

V REF

V DD

V REF

B U Z /L V D

B U Z /C D S

RX

RY

R LV D

R CDS

T E S T /S C

Fig.13 External Application Circuit

Note:

When the CDS input voltage is lower than VL, it

means that a daytime condition exists for the

PIR circuit.

Relationship LVD and CDS

The LVD and CDS trigger timing are shown in Fig.14 and Fig.15 respectively. In Fig.14, When an LVD condition occurs,

the LED will flicker and the buzzer will emit a tone. In Fig.15, When the CDS state changes from low to high, the output

of the PIR is enabled after 10 sec for the HT7612 or 0 sec for the HT7612B, and when the CDS sate changes from high

to low, will be disabled.

CDS State

(Internal signal)

Output

Enable

Comparator

Input

Comparator

Output

Rev. 1.50

Fig.14 Trigger Timing of LVD

10 sec for HT7612

0 sec for HT7612B

+ Trigger

Level

- Trigger

Level

Fig.15 Trigger Timing of CDS

8

February 21, 2011

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