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HY57V161610E 查看數據表(PDF) - Hynix Semiconductor

零件编号
产品描述 (功能)
比赛名单
HY57V161610E
Hynix
Hynix Semiconductor Hynix
HY57V161610E Datasheet PDF : 13 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
HY57V161610E
AC CHARACTERISTICS (TA=0°C to 70°C, VDD=3.0V to 3.6V, VSS=0VNote1,2)
Parameter
System clock cycle
time
CL=3
CL=2
CL=1
Clock high pulse width
Clock low pulse width
Access time from
clock
CL=3
CL=2
CL=1
Data-out hold time
Data-Input setup time
Data-Input hold time
Address setup time
Address hold time
CKE setup time
CKE hold time
Command setup time
Command hold time
CLK to data output in low Z-time
CLK to data output in high Z-time
Symbol
tCK3
tCK2
tCK1
tCHW
tCLW
tAC3
tAC2
tAC1
tOH
tDS
tDH
tAS
tAH
tCKS
tCKH
tCS
tCH
tOLZ
tOHZ
-8
Min
Max
8
-
12
-
-
-
3
-
3
-
-
6
-
6
-
-
2.5
-
2
-
1
-
2
-
1
-
2
-
1
-
2
-
1
-
2
-
2
8
-10
Min
Max
10
-
12
-
-
-
3
-
3
-
-
7
-
7
-
-
2.5
-
2.5
-
1
-
2.5
-
1
-
2.5
-
1
-
2.5
-
1
-
2
-
3
10
Note :
1.VDD(min) is 3.15V when HY57V161610ET-7 operates at CAS latency=2 and tCK2=8.9ns.
2.VDD(min) of HY57V161610ET-5/55 is 3.15V
3.tCK2 is 8.9ns only when tAC2 is 7.9ns in HY57V161610ET-6 and HY57V161610ET-7.
4.Assume tR / tF (input rise and fall time ) is 1ns.
-15
Min
Max
15
-
15
-
15
-
3
-
3
-
-
7
-
7
-
14
2.5
-
2.5
-
1
-
2.5
-
1
-
2.5
-
1
-
2.5
-
1
-
2
-
3
15
- continued -
Unit
Note
ns
3
ns
4
ns
4
ns
3
ns
ns
4
ns
4
ns
4
ns
4
ns
4
ns
4
ns
4
ns
4
ns
ns
Rev. 0.2 / Aug. 2003
8

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