IC61LV2568 查看數據表（PDF） - Integrated Circuit Solution Inc

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IC61LV2568

256K x 8 Hight Speed SRAM with 3.3V

Integrated Circuit Solution Inc 

IC61LV2568

READ CYCLE SWITCHING CHARACTERISTICS(1) (Over Operating Range)

Symbol Parameter

-8 ns

-10 ns

-12 ns

-15 ns

Min. Max. Min. Max. Min. Max. Min. Max. Unit

tRC Read Cycle Time

8 — 10 — 12 — 15 — ns

tAA Address Access Time

— 8 — 10 — 12 — 15 ns

tOHA

tACE

tDOE

tLZOE(2)

tHZOE(2)

tLZCE(2)

tHZCE(2)

Output Hold Time

CE Access Time

OE Access Time

OE to Low-Z Output

OE to High-Z Output

CE to Low-Z Output

CE to High-Z Output

3 — 3 — 3 — 3 — ns

— 8 — 10 — 12 — 15 ns

— 3 — 4 — 5 — 6 ns

0 — 0 — 0 — 0 — ns

0 3 0 4 0 5 0 6 ns

3 — 3 — 3 — 3 — ns

0 3 0 4 0 5 0 6 ns

Notes:

1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V,

input pulse levels of 0 to 3.0V and output loading specified in Figure 1.

2. Tested with the load in Figure 2. Transition is measured ±200 mV from steady-state voltage. Not

100% tested.

AC TEST CONDITIONS

Parameter

Unit

Input Pulse Level

Input Rise and Fall Times

Input and Output Timing

and Reference Levels

Output Load

0V to 3.0V

3 ns

1.5V

See Figures 1 and 2

Notes:

1. The Vcc operating range for 8 ns is 3.3V +10%, -5%.

AC TEST LOADS

3.3V

319 Ω

3.3V

319 Ω

OUTPUT

30 pF

Including

jig and

scope

Figure 1.

353 Ω

OUTPUT

5 pF

Including

jig and

scope

353 Ω

Figure 2.

Integrated Circuit Solution, Inc.

5

AHSR023-0A 09/12/2001

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