ICM-102ASA 查看數據表（PDF） - Unspecified

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ICM-102ASA

CIF CMOS image sensor

Unspecified 

ICM102A CIF CMOS sensor

Data Sheet Version1.0 July 2002

4.3 Pixel Clock Duty Cycle

In different frame rate mode (controlled by PART_CONTROL[6:3]), the duty cycle (high time / clock

period) of the PCLK signal is described in the following table:

Frame Rate

30

20

15

12

10

6

5

4

3

2

1

Duty Cycle

50.0%

66.6%

50.0%

60.0%

50.0%

50.0%

50.0%

53.3%

50.0%

50.0%

50.0%

5. Mechanical Information

Figure 3. Shrunk Plastic LCC48 Packaging

©2000, 2001, 2002 IC Media Corporation & IC Media Technology Corp.

web site: http://www.ic- media.com/

web site: http://www.ic- media.com.tw/

page 14

7/24/2002

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