ICS671-15 查看數據表（PDF） - Integrated Circuit Systems

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ICS671-15

ZERO DELAY, LOW SKEW BUFFER

Integrated Circuit Systems 

ICS671-15

ZERO DELAY, LOW SKEW BUFFER

Parameter

Symbol

Conditions

Output-to-Output Skew

tS Rising edges at VDD/2

66M CPU outputs,

Note 1

Output-to-Output Skew

tS Rising edges at VDD/2

33M PCI outputs,

Note 1

Skew from output of 66M CPU to

33M PCI, equally loaded

tS Rising edges at VDD/2

33M PCI outputs

Short-term Jitter

Input-to-Output Delay

PLL Lock Time

tJA

tD

tLOCK

pealk-to-peak

measured at VDD/2

Stable power supply,

valid clocks on 66M and

33M

Output Enable Time

(for OE1 to E6)

OE going from low to

high with stable output

Output Disable Time

(for OE1 to E6)

OE going high to low

tri-state output

Note 1: All outputs are equally loaded.

Min.

-500

Typ. Max. Units

250 500 ps

300 500 ps

300 500 ps

300

ps

+500 ps

1

ms

1.0 ns

1.0 ns

Thermal Characteristics

Parameter

Symbol Conditions

Thermal Resistance Junction to

Ambient

θJA Still air

θJA 1 m/s air flow

θJA 2 m/s air flow

Thermal Resistance Junction to Case θJC

Min.

Typ.

77

68

66

25

Max.

Units

°C/W

°C/W

°C/W

°C/W

MDS 671-15 B

5

Revision 021904

Integrated Circuit Systems ● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com

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