IDT7006S(2018) 查看數據表（PDF） - Integrated Device Technology
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比赛名单
IDT7006S Datasheet PDF : 21 Pages
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IDT7006S/L
High-Speed 16K x 8 Dual-Port Static RAM
Military, Industrial and Commercial Temperature Ranges
AC Electrical Characteristics Over the
Operating Temperature and Supply Voltage(5)
7006X15
Com'l Only
7006X17
Com'l Only
7006X20
Com'l, Ind
& Military
7006X25
Com'l &
Military
Symbol
Parameter
Min. Max. Min. Max. Min. Max. Min. Max. Unit
WRITE CYCLE
tWC
Write Cycle Time
15
____
17
____
20
____
25
____
ns
tEW
Chip Enable to End-of-Write(3)
12
____
12
____
15
____
20
____
ns
tAW
Address Valid to End-of-Write
12
____
12
____
15
____
20
____
ns
tAS
Address Set-up Time(3)
0
____
0
____
0
____
0
____
ns
tWP
Write Pulse Width
12
____
12
____
15
____
20
____
ns
tWR
Write Recovery Time
0
____
0
____
0
____
0
____
ns
tDW
Data Valid to End-of-Write
10
____
10
____
15
____
15
____
ns
tHZ
Output High-Z Time(1,2)
____
10
____
10
____
12
____
15
ns
tDH
Data Hold Time(4)
0
____
0
____
0
____
0
____
ns
tWZ
Write Enable to Output in High-Z(1,2)
____
____
____
____
____
12
____
15
ns
tOW
Output Active from End-of-Write(1,2,4)
0
____
0
____
0
____
0
____
ns
tSWRD
SEM Flag Write to Read Time
5
____
5
____
5
____
5
____
ns
tSPS
SEM Flag Contention Window
5
____
5
____
5
____
5
____
ns
2739 tbl 14a
7006X35
Com'l & Military
7006X55
Com'l, Ind
& Military
7006X70
Military
Only
Symbol
Parameter
Min. Max. Min. Max. Min. Max. Unit
WRITE CYCLE
tWC
Write Cycle Time
35
____
55
____
70
____
ns
tEW
Chip Enable to End-of-Write(3)
30
____
45
____
50
____
ns
tAW
Address Valid to End-of-Write
30
____
45
____
50
____
ns
tAS
Address Set-up Time(3)
0
____
0
____
0
____
ns
tWP
Write Pulse Width
25
____
40
____
50
____
ns
tWR
Write Recovery Time
0
____
0
____
0
____
ns
tDW
Data Valid to End-of-Write
15
____
30
____
40
____
ns
tHZ
Output High-Z Time(1,2)
____
15
____
25
____
30
ns
tDH
Data Hold Time(4)
0
____
0
____
0
____
ns
tWZ
Write Enable to Output in High-Z(1,2)
____
15
____
25
____
30
ns
tOW
Output Active from End-of-Write(1,2,4)
0
____
0
____
0
____
ns
tSWRD
SEM Flag Write to Read Time
5
____
5
____
5
____
ns
tSPS
SEM Flag Contention Window
5
____
5
____
5
____
ns
NOTES:
2739 tbl 14b
1. Transition is measured 0mV from Low or High-impedance voltage with load (Figure 2).
2. This parameter is guaranteed by device characterization, but is not production tested but not tested.
3. To access RAM, CE = VIL, SEM = VIH. To access semaphore, CE = VIH and SEM = VIL. Either condition must be valid for the entire tEW time.
4. The specification for tDH must be met by the device supplying write data to the RAM under all operating conditions. Although tDH and tOW values will vary over voltage
and temperature, the actual tDH will always be smaller than the actual tOW.
5. 'X' in part numbers indicates power rating (S or L).
6.942
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