IDT7014S 查看數據表（PDF） - Integrated Device Technology
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IDT7014S Datasheet PDF : 7 Pages
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IDT7014S
HIGH-SPEED 4K x 9 DUAL-PORT STATIC RAM
MILITARY AND COMMERCIAL TEMPERATURE RANGES
AC ELECTRICAL CHARACTERISTICS OVER THE
OPERATING TEMPERATURE AND SUPPLY VOLTAGE
7014S12
7014S15 7014S20
7014S25
7014S35
Com'l. Only Com'l. Only
Mil. Only
Symbol
Parameter
Min. Max. Min. Max. Min. Max. Min. Max. Min. Max. Unit
WRITE CYCLE
tWC Write Cycle Time
12
— 15 — 20 — 25 — 35 —
ns
tAW Address Valid to End-of-Write
10
— 14 — 15 — 20 — 30 —
ns
tAS
Address Set-up Time
0
—0
—0
—0— 0—
ns
tWP Write Pulse Width
10
— 12 — 15 — 20 — 30 —
ns
tWR Write Recovery Time
1
—1
—2
—2— 2—
ns
tDW Data Valid to End-of-Write
tHZ
Output High-Z Time(1, 2)
8
— 10 — 12 — 15 — 25 —
ns
—
7—
7—
9
— 11 — 15
ns
tDH
Data Hold Time(3)
0
—0
—0
—0— 0—
ns
tWZ
Write Enabled to Output in High-Z(1, 2)
—
7—
7—
9
— 11 — 15
ns
tOW Output Active from End-of-Write(1, 2, 3)
0
—0
—0
—0— 0—
ns
tWDD Write Pulse to Data Delay(4)
—
25 — 30 —
40 — 45 — 55
ns
tDDD Write Data Valid to Read Data Delay(4) —
22 —
25 —
30 — 35 — 45
ns
NOTES:
2528 tbl 09
1. Transition is measured ±200mV from Low or High-impedance voltage with Output Test Load (Figure 2).
2. This parameter is guaranteed by device characterization, but is not production tested.
3. The specification for tDH must be met by the device supplying write data to the RAM under all operating conditions. Although tDH and tOW values will vary
over voltage and temperature, the actual tDH will always be smaller than the actual tOW.
4. Port-to-port delay through RAM cells from writing port to reading port, refer to “Timing Waveform of Write With Port-to-Port Read”.
TIMING WAVEFORM OF WRITE WITH PORT-TO-PORT READ (1,2)
ADDR"A"
W R/ "A"
DATAIN "A"
tWC
MATCH
tWP
tDW
tDH
VALID
ADDR"B"
MATCH
tWDD
DATAOUT "B"
tDDD
NOTES:
1. R/W"B" = VIH, Read cycle pass through.
2. All timing is the same for left and right ports. Port "A" may be either left or right port. Port "B" is opposite from port "A".
6.11
VALID
2528 drw 09
5
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