IDT7028L15PF 查看數據表（PDF） - Integrated Device Technology

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IDT7028L15PF

HIGH-SPEED 64K x 16 DUAL-PORT STATIC RAM

Integrated Device Technology 

IDT7028L

High-Speed 64K x 16 Dual-Port Static RAM

Industrial and Commercial Temperature Ranges

Waveform of BUSY Arbitration Controlled by CE Timing (M/S = VIH)(1,3)

ADDR"A"

and "B"

ADDRESSES MATCH

CE"A"

CE"B"

BUSY"B"

tAPS (2)

tBAC

tBDC

4836 drw 13

Waveform of BUSY Arbitration Cycle Controlled by Address Match

Timing (M/S = VIH)(1)

ADDR"A"

ADDR"B"

BUSY"B"

ADDRESS "N"

tAPS (2)

MATCHING ADDRESS "N"

tBAA

tBDA

4836 drw 14

NOTES:

1. All timing is the same for left and right ports. Port “A” may be either the left or right port. Port “B” is the port opposite from port “A”.

2. If tAPS is not satisfied, the BUSY signal will be asserted on one side or another but there is no guarantee on which side BUSY will be asserted.

3. Refer to Chip Enable Truth Table.

AC Electrical Characteristics Over the

Operating Temperature and Supply Voltage Range(1)

7028L15

Com'l Only

Symbol

Parameter

Min. Max.

INTERRUPT TIMING

tAS

Address Set-up Time

0

____

tWR

Write Recovery Time

0

____

tINS

Interrupt Set Time

____

15

tINR

Interrupt Reset Time

____

15

NOTES:

1. Industrial Temperature: for specific speeds, packages and powers contact your sales office.

7028L20

Com'l Only

Min. Max. Unit

0

____

ns

0

____

ns

____

20

ns

____

20

ns

4836 tbl 15

12

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