IDT72805LB(1996) 查看數據表（PDF） - Integrated Device Technology

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IDT72805LB
(Rev.:1996)

CMOS DUAL SyncFIFO DUAL 256 x 18, DUAL 512 x 18, DUAL 1024 x 18

Integrated Device Technology 

IDT72805/72815/72825 CMOS Dual SyncFIFO™

256 x 18-BIT, 512 x 18, and 1024 x 18

COMMERCIAL TEMPERATURE RANGE

DATA IN

WRITE CLOCK

WRITE ENABLE

RESET

LOAD

FULL FLAG

Vcc

FIRST LOAD

•

•

FIRST LOAD

WXOA RXOA

LDA RCLKA

WCLKA RENA

WENA OEA

RSA

DAn

QAn

FIFO A

1024x18

FLA

FFA

EFA

WXIA RXIA

72825

WXOB RXOB

WCLKB RCLKB

WENB RENB

RSB OEB

DBn

QB n

LDB

FIFO B

1024x18

FFB

EFB

FLB

WXIB RXIB

DATA OUT

•

READ CLOCK

READ ENABLE

OUTPUT ENABLE

EMPTY FLAG

3139 drw 21

Figure 21. Block Diagram of 2048 x 18 Synchronous FIFO Memory With Programmable

Flags used in Depth Expansion Configuration

5.17

19

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