IN74ACT574DW 查看數據表（PDF） - IK Semicon Co., Ltd

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IN74ACT574DW

Octal 3-State Noninverting D Flip-Flop High-Performance Silicon-Gate CMOS

IK Semicon Co., Ltd 

IN74ACT574

AC ELECTRICAL CHARACTERISTICS (VCC=5.0 V ± 10%, CL=50pF, Input tr=tf=3.0 ns)

Symbol

Parameter

fmax Maximum Clock Frequency (50% Duty Cycle)

(Figure 1)

tPLH Propagation Delay, Clock to Q (Figure 1)

tPHL Propagation Delay, Clock to Q (Figure 1)

tPZH Propagation Delay, Output Enable to Q (Figure 2)

tPZL Propagation Delay, Output Enable to Q (Figure 2)

tPHZ Propagation Delay, Output Enable to Q (Figure 2)

tPLZ Propagation Delay, Output Enable to Q (Figure 2)

CIN Maximum Input Capacitance

Guaranteed Limits

25 °C

-40°C to 85°C

Min Max Min Max

100

85

2.5 11

2.0 10

2.0 9.5

2.0 9.0

2.0 10.5

2.0 8.5

4.5

2.0

12

1.5

11

1.5

10

1.5

10

1.5 11.5

1.5 9.0

4.5

Unit

MHz

ns

ns

ns

ns

ns

ns

pF

CPD Power Dissipation Capacitance

Typical @25°C,VCC=5.0 V

40

pF

TIMING REQUIREMENTS (VCC=5.0 V ± 10%, CL=50pF, Input tr=tf=3.0 ns)

Symbol

tSU

th

tw

Parameter

Minimum Setup Time, Data to Clock

(Figure 3)

Minimum Hold Time, Clock to Data

(Figure 3)

Minimum Pulse Width, Clock (Figure 1)

Guaranteed Limit

25°C

-40°C to 85°C Unit

2.5

2.5

ns

1.0

1.0

ns

3.0

4.0

ns

Rev. 00

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