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HM621400HC 查看數據表(PDF) - Hitachi -> Renesas Electronics

零件编号
产品描述 (功能)
比赛名单
HM621400HC
Hitachi
Hitachi -> Renesas Electronics Hitachi
HM621400HC Datasheet PDF : 14 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
HM621400HC Series
4M High Speed SRAM (4-Mword × 1-bit)
ADE-203-1199 (Z)
Preliminary
Rev. 0.0
Nov. 30, 2000
Description
The HM621400HC is a 4-Mbit high speed static RAM organized 4-Mword × 1-bit. It has realized high speed
access time by employing CMOS process (6-transistor memory cell)and high speed circuit designing
technology. It is most appropriate for the application which requires high speed and high density memory,
such as cache and buffer memory in system. The HM621400HC is packaged in 400-mil 32-pin SOJ for high
density surface mounting.
Features
Single 5.0 V supply: 5.0 V ± 10 %
Access time: 10 ns (max)
Completely static memory
No clock or timing strobe required
Equal access and cycle times
Directly TTL compatible
All inputs and outputs
Operating current: 140 mA (max)
TTL standby current: 40 mA (max)
CMOS standby current: 5 mA (max)
: 1.2 mA (max) (L-version)
Data retension current: 0.8 mA (max) (L-version)
Data retension voltage: 2 V (min) (L-version)
Center VCC and VSS type pinout
Preliminary: The specification of this device are subject to change without notice. Please contact your nearest
Hitachi’s Sales Dept. regarding specification.

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