IRLR/U2705
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter
V(BR)DSS Drain-to-Source Breakdown Voltage
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient
RDS(on)
Static Drain-to-Source On-Resistance
VGS(th)
gfs
IDSS
IGSS
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
LD
LS
Ciss
Coss
Crss
Gate Threshold Voltage
Forward Transconductance
Drain-to-Source Leakage Current
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Internal Drain Inductance
Internal Source Inductance
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Min. Typ. Max. Units
Conditions
55 ––– ––– V VGS = 0V, ID = 250µA
––– 0.065 ––– V/°C Reference to 25°C, ID = 1mA
––– ––– 0.040
VGS = 10V, ID = 17A
––– ––– 0.051 W VGS = 5.0V, ID = 17A
––– ––– 0.065
VGS = 4.0V, ID = 14A
1.0 ––– 2.0 V VDS = VGS, ID = 250µA
11 ––– ––– S VDS = 25V, ID = 16A
––– ––– 25
––– ––– 250
µA VDS = 55V, VGS = 0V
VDS = 44V, VGS = 0V, TJ = 150°C
––– ––– 100 nA VGS = 16V
––– ––– -100
VGS = -16V
––– ––– 25
ID = 16A
––– ––– 5.2
––– ––– 14
nC VDS = 44V
VGS = 5.0V, See Fig. 6 and 13
––– 8.9 –––
VDD = 28V
––– 100 –––
––– 21 –––
––– 29 –––
ns ID = 16A
RG = 6.5Ω, VGS = 5.0V
RD = 1.8Ω, See Fig. 10
Between lead,
D
4.5 nH 6mm (0.25in.)
––– 7.5 –––
from package
G
and center of die contact
S
––– 880 –––
VGS = 0V
––– 220 ––– pF VDS = 25V
––– 94 –––
ƒ = 1.0MHz, See Fig. 5
Source-Drain Ratings and Characteristics
Parameter
IS
Continuous Source Current
(Body Diode)
ISM
Pulsed Source Current
(Body Diode)
VSD
Diode Forward Voltage
trr
Reverse Recovery Time
Qrr
Reverse RecoveryCharge
ton
Forward Turn-On Time
Min. Typ. Max. Units
Conditions
MOSFET symbol
D
––– ––– 28
A showing the
integral reverse
G
––– ––– 110
p-n junction diode.
S
––– ––– 1.3 V TJ = 25°C, IS = 17A, VGS = 0V
––– 76 110 ns TJ = 25°C, IF = 16A
––– 190 290 nC di/dt = 100A/µs
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
VDD = 25V, starting TJ = 25°C, L = 610µH
RG = 25Ω, IAS = 16A. (See Figure 12)
ISD ≤ 16A, di/dt ≤ 270A/µs, VDD ≤ V(BR)DSS,
TJ ≤ 175°C
Pulse width ≤ 300µs; duty cycle ≤ 2%.
2
Caculated continuous current based on maximum allowable
junction temperature; Package limitation current = 20A.
This is applied for I-PAK, LS of D-PAK is measured between
lead and center of die contact.
Uses IRLZ34N data and test conditions.
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